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Boolean Algebra Discrete Mathematics and Its Applications Baojian Hua bjhua@ustc.edu.cn
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Outline Data representation Program representation Program execution Final goal: Design your own CPU programming assignment #5
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Number System Decimal digit 0~9 Ex: 21 Binary digit 0 or 1 Ex: 00010101 (8-bit representation of 21) Hexadecimal digit 0~9, letter a~f Ex: 15h (or 0x15)
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Memory and Address Computer memory could be think of as a big array
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Memory and Address Computer memory could be think of as a big array each slot has a continuous address 0 1 2 3 4 …
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Memory and Address Computer memory could be think of as a big array each slot has a continuous address each slot is divided into 8 bits (a byte) 0 1 2 3 4 …
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Ex: Store 21 The storage of integer number of 21 in a single byte! 0 1 2 3 4 … 0 1234567 10001010
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Ex: Store 21 The storage of integer number of 21 in a single byte! However, most current machines are called “ 32-bit ”, what does this mean? 0 1 2 3 4 … 0 1234567 10001010
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Ex: Store 21 The storage of integer number of “ 21 ” in a single byte! However, most current machines are 32-bits, what does this mean? Answer: an integer value occupies 32-bit (or 4 bytes) 0 1 2 3 4 … 0 1234567 10001010
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Ex: Store 21 “ 21 ” in 32-bit: 00000000 00010101 how to store this 32-bit long binary number in memory? 0 1 2 3 4 … 0 1234567
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Big-endian and Little-endian Big-endian and little-endian are named after the convention of storing multibyte data in memory Big-endian: most-significant byte at low address Ex: Sun Sparc Little-endian: reverse Ex: Pentium
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Big-endian and Little-endian “ 21 ” in 32-bit: 00000000 00010101 Little-endian in the right figure See demo … 0 1 2 3 4 … 0 1234567 0 0 0010101 00000 0 0 0 0 000000 00000000
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Negative Integers Two ’ s complement: absolute value one ’ s complement add 1 Ex: -21 00000000,00000000,00000000,00010101 11111111,11111111,11111111,11101010 11111111,11111111,11111111,11101011
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Moral: Data in Machine Data at the machine level has no assumed meaning Ex: 11111111 255? or -1? or … ? Slogan: meaning = bits + context bits: the data context: how this data is interpreted used We ’ d see more exciting examples below
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Sign Extension Sign extension happens when data sizes are changed: decrease increase Consider the right when 8 32 0 1 2 3 4 … 0 1234567 0 0 0010101 00000 0 0 0 0 000000 00000000
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Size Decrease For unsigned numbers, all the deleted significant bits must be “ 0 ” Ex: 003fh ==> 3fh Ex: 103fh ==> 3fh (wrong) For signed numbers: all the deleted bits must be “ 0 ”, and the new leading bit is also “ 0 ” all the deleted bits must be “ 1 ”, and the new leading bit is also “ 1 ” Ex: 003fh ==> 3fh Ex: ff3fh ==> 3fh (wrong)
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Size Increase For unsigned numbers, all the inserted bits must be “ 0 ” Ex: 3fh ==> 003fh Ex: f3h ==> 00f3h For signed numbers: all the inserted bits must be same with leading bit Ex: 3fh ==> 003fh Ex: f3h ==> fff3h Important: machine does not under this
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Example from C unsigned char uc = 0xff; signed char sc = 0xff; printf (“%d\n", uc); printf ("%d\n", sc); int ui = (int) uc; int si = (int) sc; printf ("%d\n", ui); printf ("%d\n", si);
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Typical Pitfalls in C int fgetc (FILE *stream); // fgetc returns the next character of stream as // an unsiged char (converted to an int), or EOF // if end of file or error occurs // Note: EOF is typical -1 char c; while ((c=fgetc(file))!=EOF) { …; } // Is this right?
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Program Representation What the binary form of program look like? A program in binary form is also just a series of 0 and 1 (as we expect) typical in readable and friendly assembly form next, we turn back to our miniPentium language in programming assignment #2
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miniPentium prog -> instruction prog | instruction instruction -> movl v, id | addl v, id | subl v, id | mull v, id | print v v -> id | num // Sample program: movl1, x movl2, y addlx, y printy But how to represent all these on a machine? (who only knows about binary)
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Binary Encoding prog -> instruction prog | instruction instruction -> movl v, id | addl v, id | subl v, id | mull v, id | print v v -> id | num Our goal is to put these instructions in a series of types. For simplicity, we assume a single byte. 0123456 7
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Binary Encoding prog -> instruction prog | instruction instruction -> movl v, id | addl v, id | subl v, id | mull v, id | print v v -> id | num Our goal is to put these instructions in a series of types. For simplicity, we assume a single byte. 0123456 7 a[0]~a[2] movl: 000 addl: 001 subl: 010 mull: 011 print: 100
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Binary Encoding prog -> instruction prog | instruction instruction -> movl v, id | addl v, id | subl v, id | mull v, id | print v v -> id | num Our goal is to put these instructions in a series of types. For simplicity, we assume a single byte. 0123456 7 a[0]~a[2]: movl: 000 addl: 001 subl: 010 mull: 011 print: 100 a[3]: id: 0 num: 1
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Binary Encoding prog -> instruction prog | instruction instruction -> movl v, id | addl v, id | subl v, id | mull v, id | print v v -> id | num Our goal is to put these instructions in a series of types. For simplicity, we assume a single byte. 0123456 7 a[0]~a[2]: movl: 000 addl: 001 subl: 010 mull: 011 print: 100 a[3]: id: 0 num: 1 a[4]~a[5]: id: address num: value
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Binary Encoding prog -> instruction prog | instruction instruction -> movl v, id | addl v, id | subl v, id | mull v, id | print v v -> id | num Our goal is to put these instructions in a series of types. For simplicity, we assume a single byte. 0123456 7 a[0]~a[2]: movl: 000 addl: 001 subl: 010 mull: 011 print: 100 a[3]: id: 0 num: 1 a[4]~a[5]: id: address num: value a[6]~a[7]: id: address
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Binary Encoding prog -> instruction prog | instruction instruction -> movl v, id | addl v, id | subl v, id | mull v, id | print v v -> id | num Exercise: represent this: movl1, x movl2, y addlx, y printy 0123456 7 a[0]~a[2]: movl: 000 addl: 001 subl: 010 mull: 011 print: 100 a[3]: id: 0 num: 1 a[4]~a[5]: id: address num: value a[6]~a[7]: id: address
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Binary Encoding prog -> instruction prog | instruction instruction -> movl v, id | addl v, id | subl v, id | mull v, id | print v v -> id | num Exercise: x@0, y@1 movl1, x movl2, y addlx, y printy 0123456 7 a[0]~a[2]: movl: 000 addl: 001 subl: 010 mull: 011 print: 100 a[3]: id: 0 num: 1 a[4]~a[5]: id: address num: value a[6]~a[7]: id: address
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Binary Encoding prog -> instruction prog | instruction instruction -> movl v, id | addl v, id | subl v, id | mull v, id | print v v -> id | num Exercise: x@0, y@1 movl1, x movl2, y addlx, y printy 0123456 7 a[0]~a[2]: movl: 000 addl: 001 subl: 010 mull: 011 print: 100 a[3]: id: 0 num: 1 a[4]~a[5]: id: address num: value a[6]~a[7]: id: address Solution: 00011000 01101000 01000001 00010100
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Binary Encoding prog -> instruction prog | instruction instruction -> movl v, id | addl v, id | subl v, id | mull v, id | print v v -> id | num Exercise: x@0, y@1 movl1, x movl2, y addlx, y printy 0123456 7 a[0]~a[2]: movl: 000 addl: 001 subl: 010 mull: 011 print: 100 a[3]: id: 0 num: 1 a[4]~a[5]: id: address num: value a[6]~a[7]: id: address Solution: 00011000 01101000 01000001 00010100
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Put all these In Memory // x@0, y@1 movl1, x movl2, y addlx, y printy // binary form 00011000 01101000 01000001 00010100 0123456 7 0 1 2 3 4 5 6 7 8
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Put all these In Memory // x@0, y@1 movl1, x movl2, y addlx, y printy // binary form 00011000 01101000 01000001 00010100 ######## 0123456 7 ########00011000011010000100000100010100 0 1 2 3 4 5 6 7 8
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Adding a CPU movl1, x movl2, y addlx, y print y ######## 0123456 7 ######## 00011000011010000100000100010100 0 1 2 3 4 5 6 7 8
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Adding a CPU movl1, x movl2, y addlx, y print y 00000001 0123456 7 ######## 00011000011010000100000100010100 0 1 2 3 4 5 6 7 8
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Adding a CPU movl1, x movl2, y addlx, y print y 00000001 0123456 7 00000010 00011000011010000100000100010100 0 1 2 3 4 5 6 7 8
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Adding a CPU movl1, x movl2, y addlx, y print y 00000001 0123456 7 00000011 00011000011010000100000100010100 0 1 2 3 4 5 6 7 8
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Adding a CPU movl1, x movl2, y addlx, y print y // print “ 3 ” on screen 00000001 0123456 7 00000011 00011000011010000100000100010100 0 1 2 3 4 5 6 7 8
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Some Real World Issues The binary encoding strategy for miniPentium discussed above is far from real Pentium Pentium is 32-bit instruction is of variant-length (1-6 bytes) more complex addressing mode abundant instructions (700+ pages) … However, the key idea is essential
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CISC and RISC Complex Instruction Set Computer: designed in 60 ’ -70 ’ last century popular in desktop applications Ex: Intel ’ Pentium Reduced Instruction Set Computer: Uniform instruction representation (just as we ’ ve done for miniPentium) relatively few instructions (<100) simple addressing mode designed from 80 ’, popular in embedded area Ex: MIPS, ARM, etc
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Programming Assignment #4: CPU Design and Implementation Design a binary encoding strategy to encode the miniPentium (in 32-bit) Use your favorite language, implement the memory. Make the following assumption to simplify your life: integers unsigned memory infinite data and program isolated Write a function to make your CPU run write some test programs (binaries by hand)
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Programming Assignment #4: CPU Design and Implementation Connect your CPU with the miniVC compiler in the programming assignment #3 write programs in miniC miniVC compiles miniC to mimiPentium write an assembler assembles into binaries run your CPU
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