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4-to-1 Multiplexer: Module Instantiation Discussion D7.2 Example 5
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4-to-1 Multiplexer Module Instantiation Logic Equation for a 4-to-1 MUX
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2 x 1 MUX y = a & ~s | b & s
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4-to-1 Multiplexer z 4 x 1 MUX s0s1 c0 c1 c2 c3 z s1s0 0 0 c0 0 1 c1 1 0 c2 1 1 c3
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Multiplexers z 4 x 1 MUX s0s1 c0 c1 c2 c3 z s1s0 0 0 c0 0 1 c1 1 0 c2 1 1 c3 0 A multiplexer is a digital switch
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Multiplexers z 4 x 1 MUX s0s1 c0 c1 c2 c3 z s1s0 0 0 c0 0 1 c1 1 0 c2 1 1 c3 0 1
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Multiplexers z 4 x 1 MUX s0s1 c0 c1 c2 c3 z s1s0 0 0 c0 0 1 c1 1 0 c2 1 1 c3 1 0
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Multiplexers z 4 x 1 MUX s0s1 c0 c1 c2 c3 z s1s0 0 0 c0 0 1 c1 1 0 c2 1 1 c3 1
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Creating a 4 x 1 MUX from 2 x 1 MUXs
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// Example 5a: 4-to-1 MUX using module instantiation module mux41 ( input wire [3:0] c, input wire [1:0] s, output wire z ); // Internal signals wire v;// output of mux M1 wire w;// output of mux M2 // Module instantiations mux21a M1 (.a(c[0]),.b(c[1]),.s(s[0]),.y(v) ); mux21a M2 (.a(c[2]),.b(c[3]),.s(s[0]),.y(w) ); mux21a M3 (.a(v),.b(w),.s(s[1]),.y(z) ); endmodule
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// Example 4a: 2-to-1 MUX using logic equations module mux21a ( input wire a, input wire b, input wire s, output wire y ); assign y = ~s & a | s & b; endmodule mux21a M1 (.a(c[0]),.b(c[1]),.s(s[0]),.y(v) );
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// Example 4a: 2-to-1 MUX using logic equations module mux21a ( input wire a, input wire b, input wire s, output wire y ); assign y = ~s & a | s & b; endmodule mux21a M2 (.a(c[2]),.b(c[3]),.s(s[0]),.y(w) );
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// Example 4a: 2-to-1 MUX using logic equations module mux21a ( input wire a, input wire b, input wire s, output wire y ); assign y = ~s & a | s & b; endmodule mux21a M3 (.a(v),.b(w),.s(s[1]),.y(z) );
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mux21a Label1 (.a(a),.b(b),.s(s),.y(y) );
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Aldec Active-HDL Simulation
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4-to-1 Multiplexer Module Instantiation Logic Equation for a 4-to-1 MUX
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2 x 1 MUX y = a & ~s | b & s
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v = ~s0 & c0 | s0 & c1 w = ~s0 & c2 | s0 & c3 z = ~s1 & v | s1 & w z = ~s1 & (~s0 & c0 | s0 & c1) | s1 & (~s0 & c2 | s0 & c3) z = ~s1 & ~s0 & c0 | ~s1 & s0 & c1 | s1 & ~s0 & c2 | s1 & s0 & c3
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4-to-1 Multiplexer z 4 x 1 MUX s0s1 c0 c1 c2 c3 z s1s0 0 0 c0 0 1 c1 1 0 c2 1 1 c3 z = ~s1 & ~s0 & c0 | ~s1 & s0 & c1 | s1 & ~s0 & c2 | s1 & s0 & c3
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