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Computer Architecture: Intro Anatomy of a CPU J. Schmalzel S. Mandayam
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Hierarchical View of EP and Digital Systems CPUMEM I/O Gates Boolean Algebra Design Techniques MSI Functions State Machines Interface Method Computer Architecture Operating System HLLs
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Block Diagram
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Concept of CPU as Two Paths §Data Path l Where data elements flow from/to l Where operations are performed §Control Path l The source of data path control
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Simple Model Data Path (7-18) Dbus n-bit bus Signal Dbus Dout Aout FS Status DA AA RW Const MB MD Register File Function Unit MuxB MuxD Din BA
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Instruction Word DA AA BA MB FS MD RW 33311 5
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Iword, cont. RW to write back result AA, BA, DA: 3-bit selection field to select 1-of-8 registers MB to select source operand for B path FS to select operation MD to select source for register file load RF FU
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Function Select Codes 00000F=A 00001F=A+1 00010F=A+B 00011F=A+B+1 00100F=A+ ~B 00101F= A+ ~B + 1 00110F=A-1 00111F=A 01000F=A & B 01010F=A | B 01100F=A B 01110F= ~A 10000F=B 10100F= sr B 11000F= sl B
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FU (ALU) Design Approaches §Complex combinatorial structure §Multiplexed discrete logical and arithmetic units §HDL model
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Consider Implementation §Use organization of FS codes to partition system (use FS4 and FS3): l 00-Arithmetic l 01-Logical l 10, 11-Shift, Miscellaneous
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Questions, Comments, Discussion
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