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EE4271 VLSI Design Advanced Interconnect Optimizations Buffer Insertion
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Objectives What have we learned? –Buffer insertion on a single wire What are we going to learn? –Buffer insertion on a tree
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Timing Driven Buffering Problem Formulation Given –A Steiner tree –RAT at each sink –A buffer type –RC parameters –Candidate buffer locations Find buffer insertion solution such that the slack at the driver is maximized
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Candidate Buffering Solutions
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Candidate Solution Characteristics Each candidate solution is associated with –v i : a node –c i : downstream capacitance –q i : RAT v i is a sink c i is sink capacitance v is an internal node
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Van Ginneken’s Algorithm Candidate solutions are propagated toward the source
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Solution Propagation: Add Wire c 2 = c 1 + cx q 2 = q 1 – rcx 2 /2 – rxc 1 r: wire resistance per unit length c: wire capacitance per unit length (v 1, c 1, q 1 ) (v 2, c 2, q 2 ) x
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8 Solution Propagation: Insert Buffer c 1b = C b q 1b = q 1 – R b c 1 C b : buffer input capacitance R b : buffer output resistance (v 1, c 1, q 1 ) (v 1, c 1b, q 1b )
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Solution Propagation: Merge c merge = c l + c r q merge = min(q l, q r ) (v, c l, q l )(v, c r, q r )
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Solution Propagation: Add Driver q 0d = q 0 – R d c 0 = slack min R d : driver resistance Pick solution with max slack min (v 0, c 0, q 0 ) (v 0, c 0d, q 0d )
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11 Example of Merging Left candidates Right candidates Merged candidates
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Solution Pruning Two candidate solutions –(v, c 1, q 1 ) –(v, c 2, q 2 ) Solution 1 is inferior if –c 1 ≥ c 2 : larger load –and q 1 ≤ q 2 : tighter timing
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13 Merging Branches Right Candidates Left Candidates
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14 Pruning Merged Branches Critical With pruning
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Exercise Compute candidate buffer solutions after merge. (5,10) (8,15) (10,20) (12,25) (2,7) (7,10) (9,15)
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Exercise (20,400) 2 2 2 2 Unit Wire Cap = 5 Unit Wire Res = 3 Buffer C=5, R=1 Perform buffer insertion to maximize the slack at driver (15,300)
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Summary Buffer insertion on a tree Solution pruning can significantly reduce the number of solutions
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