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Bridging the Energy Gap in Size, Weight and Power Constrained Software Defined Radio: Agile Baseband Processing as a Key Enabler Bruno Bougard, Min Li,

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Presentation on theme: "Bridging the Energy Gap in Size, Weight and Power Constrained Software Defined Radio: Agile Baseband Processing as a Key Enabler Bruno Bougard, Min Li,"— Presentation transcript:

1 Bridging the Energy Gap in Size, Weight and Power Constrained Software Defined Radio: Agile Baseband Processing as a Key Enabler Bruno Bougard, Min Li, David Novo, Liesbet Van der Perre and Francky Catthoor

2 Bruno Bougard et al. Athens, May 2008 2 The number of standards to implement in a single handset increases dramatically Mobility Stationary Walking Driving Data rate 10Mbps IEEE 802.16a,d 1100 HSxPA IEEE 802.16e GSM GPRS DECT EDGE 3G LTE 0.1 BlueTooth UMTS WLAN (IEEE 802.11b) WLAN (IEEE 802.11a/g/n)

3 Bruno Bougard et al. Athens, May 2008 3 All cost factors direct towards high-volume programmable solutions everywhere possible [source: ICERA]

4 Bruno Bougard et al. Athens, May 2008 4 Two barriers remain The energy gap The exploding complexity 2G 3G 3G+ LTE?.11b.11g.11n MIMO

5 Bruno Bougard et al. Athens, May 2008 5 VLIW/DSPs ASIPs FPGAs Most SWPC SDR research focuses on more energy efficient processor architectures Flexibility Efficiency ASICs VLIW/DSPs ASIPs FPGAs RISCs GPPs ? VLIW/DSPs ASIPs FPGAs NXP onDSP, EVP Sandbridge Sandblaster SB3011 SiliconHive CSP2200 Infineon MUSIC Icera DXP Nokia VectorASIP UMich SODA ULinkoping/CORESONI CS BBE2 TUDresden SAMIRA …

6 Bruno Bougard et al. Athens, May 2008 6 Radio Baseband Platform Requirements Low Cost Energy Aware Spectrum Agile Long HW lifespan Short SW deployment time Scalable HW/SW Energy aware HW Energy aware algorithms Energy aware protocols Techno-aware power managnt Versatile RX digital front end Versatile TX digital front end Powerful MAC/RLC/QoS Ctrl

7 Bruno Bougard et al. Athens, May 2008 7 Outline IMEC SDR Baseband Platform Wanted: Platform Aware Signal Processing Case study 1: OFDMA transmitter Case study 2: OFDMA receiver Case study 3: Dynamic fixed-point format assignment

8 Bruno Bougard et al. Athens, May 2008 8 Outline IMEC SDR Baseband Platform Wanted: Platform Aware Signal Processing Case study 1: OFDMA transmitter Case study 2: OFDMA receiver Case study 3: Dynamic fixed-point format assignment

9 Bruno Bougard et al. Athens, May 2008 9 Where do you need flexibility? Where do you need energy efficiency? Duty Cycle Diversity/Versatility FE steering Signal detection Synchronization Modulation Demodulation (Inner Modem) Forward Error Correction (Outer Modem)

10 Bruno Bougard et al. Athens, May 2008 10 Where do you need flexibility? Where do you need energy efficiency? Need in energy efficiency Need in flexibility FE steering Signal detection Synchronization Modulation Demodulation (Inner Modem) Forward Error Correction (Outer Modem)

11 Bruno Bougard et al. Athens, May 2008 11 IMEC MIMO-capable SDR baseband platform 802.11n and next gen. 802.16e and next gen. Up to 3 antennas Up to 200Mbps <500mW Flexible platform 3GPP LTE DVB-H/T

12 Bruno Bougard et al. Athens, May 2008 12 Baseband platform architecture DFE ARM subsystem Outer Modem Baseband Engines

13 Bruno Bougard et al. Athens, May 2008 13 Two Programmable CGA Processor Cores at its heart 4x4 64-bit 4-way SIMD CGA VLIW and CGA mode of operations C-programmable 4-bank 64K L1 data scratchpad 32K I$ AHB interface CGA configurable via DMA 25 (theoretical) GOPS 46MOPS/mW Shared registerfile 64bit SIMD units Distributed local registerfile Configuration context memory

14 Bruno Bougard et al. Athens, May 2008 14 Two Programmable CGA Processor Cores at its heart 32KB I$ 128KB IMEM 128-entries CMEM 64KB L1 data scratchpad TSMC 90G Dual VT and substrate biasing for leakage reduction in sleep mode Clock rate 400MHz WCC Total Area: 6 sqmm Power consumption –Active TC VLIW75mW –Active TC CGA300mW –Leakage @ T=65C 25mW –Leakage in standby<10mW 4x4 64-bit 4-way SIMD CGA VLIW and CGA mode of operations C-programmable 25 (theoretical) GOPS 46MOPS/mW

15 Bruno Bougard et al. Athens, May 2008 15 200 Mbps+ SDR application driver IEEE 802.11 n digital inner modem receiver –Channel bonding 40MHz –2 antennas MIMO SDM OFDM -3

16 Bruno Bougard et al. Athens, May 2008 16 Performance for SDR benchmarks and OFDM application prove excellent array utilization 2-antenna SDM-OFDM @100Mbps

17 Bruno Bougard et al. Athens, May 2008 17 Profiling for SDR benchmarks and OFDM full application prove real time operations @100Mbps 2-antenna SDM-OFDM @100Mbps

18 Bruno Bougard et al. Athens, May 2008 18 Great benefit in area but power higher than dedicated hardware solutions Active Power VLIW: 75mW Active Power CGA: 300mW Leakage Power: 25mW 0 0.5 1 1.5 2 2.5 3 3.5 4 802.11n802.16eDVB-H11n&16eall 0 50 100 150 200 250 300 350 400 SDR (IMEC) Reconf. (Intel) ASIC (source: Intel) SDR (IMEC) ASIC (Atheros)

19 Bruno Bougard et al. Athens, May 2008 19 The interconnection network dominates the power consumption in VLIW and CGA modes VLIW modeCGA mode Active power: 75mW Leakage Power: 25mW Active power: 300mW Leakage Power: 25mW

20 Bruno Bougard et al. Athens, May 2008 20 Outline IMEC SDR Baseband Platform Wanted: Platform Aware Signal Processing Case study 1: OFDMA transmitter Case study 2: OFDMA receiver Case study 3: Dynamic fixed-point format assignment

21 Bruno Bougard et al. Athens, May 2008 21 Wanted: SDR-Platform Aware Signal Processing Elephant as Platform Horse as Platform

22 Bruno Bougard et al. Athens, May 2008 22 Dynamic signal processing implementation Time 3GPP Channel response Cycle Count on SoA processor

23 Bruno Bougard et al. Athens, May 2008 23 Wanted: SDR-Platform Aware Signal Processing ASIC as platform Requires simple control flow Requires manifest and regular computation structures Maximum functional reuse is a must Minimum data wordwidth Accommodates high computation loads Highest energy efficiency SDR as platform Accommodates more complex control flows Accommodates complex and irregular computation structures Functional reuse not a must (reuse memory footprint only) Aligned data wordwidth Limited maximum computation load Lower energy efficiency

24 Bruno Bougard et al. Athens, May 2008 24 Algorithm-Architecture Co-Design Make algorithm compatible with architecture/compiler constraints Exploit opportunities of programmable architecture Architecture/ Compiler Algorithm/Software

25 Bruno Bougard et al. Athens, May 2008 25 Channel Observation Wireless baseband processing implies high dynamics Wireless baseband processing tolerate inaccuracy This is already considered at system level (X-layer), but what about in the signal processing implementation?

26 Bruno Bougard et al. Athens, May 2008 26 The opportunity Two viewpoints toward complexity –Computation complexity and memory complexity –Structure complexity (control flow, heterogeneity, etc.) Wireless system can cope with inaccuracy (“scalable” QoS) On SDR –Computation complexity is much more costly than in ASIC –Memory complexity is as costly as in ASIC –Structure complexity is much less costly than in ASIC What can we do ? Increase the structure complexity of baseband processing to reduce the average computation and memory complexity by enabling run-time adaptation of the algorithms implementation to the dynamics in QoS requirement, environment (and platform) Baseband ASIC with Low Structure Complexity SDR Baseband with High Structure Complexity

27 Bruno Bougard et al. Athens, May 2008 27 Outline IMEC SDR Baseband Platform Wanted: Platform Aware Signal Processing Case study 1: OFDMA transmitter Case study 2: OFDMA receiver Case study 3: Dynamic fixed-point format assignment

28 Bruno Bougard et al. Athens, May 2008 28 Motivation: OFDMA Modulation Error requirements vary WiMAX Specification Modulation accuracy can be relaxed for lower order modulation

29 Bruno Bougard et al. Athens, May 2008 29 RCE relaxation can be exploited by a scalable digital OFDMA Modulator Original: A large-size (e.g., 1024) IFFT based non-scalable modulator Transformed: An scalable OFDMA modulator with 3 cascaded components Interpolation factor can be used as a knob to adjust the accuracy and computation load to the RCE requirement

30 Bruno Bougard et al. Athens, May 2008 30 Computation load scales smoothly with the interpolation factor Normalized cycle count Interpolation factor

31 Bruno Bougard et al. Athens, May 2008 31 Outline IMEC SDR Baseband Platform Wanted: Platform Aware Signal Processing Case study 1: OFDMA transmitter Case study 2: OFDMA receiver Case study 3: adaptive fixed-point refinement

32 Bruno Bougard et al. Athens, May 2008 32 OFDMA mod./demod. requires (I)FFT with Partial input/output The position and number of bins change dynamically

33 Bruno Bougard et al. Athens, May 2008 33 Efficient Partial FFT on ILP Architectures Exploit the partial input/output to reduce active instructions and memory accesses 30 years theoretical research on PFFT but few implementations We propose a generic and efficient scheme for PFFT on ILP architectures –Any pattern of bin-distribution can be implemented

34 Bruno Bougard et al. Athens, May 2008 34 The proposed scheme brings important gains in almost all implementation cost factors and scales smoothly with the number of sub-carriers to be processed

35 Bruno Bougard et al. Athens, May 2008 35 The prize to pay is an higher instruction cache miss rate (acceptable)

36 Bruno Bougard et al. Athens, May 2008 36 Outline IMEC SDR Baseband Platform Wanted: Platform Aware Signal Processing Case study 1: OFDMA transmitter Case study 2: OFDMA receiver Case study 3: Dynamic fixed-point format assignment

37 Bruno Bougard et al. Athens, May 2008 37 State-of-the-art Automatic Floating point to fixed point conversion (>30 years of work) –Commercial products: Catalytic Inc. & Mathworks –Recent academic contributions: Simulation-based: Seoul National Univ. (‘95) Analytical methods: Aachen (‘98), Northwest Univ. (‘01) Hybrid methods: Imperial College (‘03), Berkeley (‘04) and ENSSAT (‘05) [Yoshizawa, S. et Al. ISCAS’06] Run-time word-length selection: Receiver VLSI architecture based in a control feedback loop. Hokkaido University (‘06)

38 Bruno Bougard et al. Athens, May 2008 38 Modeling of the fixed-point communication system Performance of the communication system as a function of the receiver SNR –BER = f(SNR) + b a c + nana a c + nbnb ancnc Fixed-point refined system includes quantization noise –BER = f(SNR, n a, n b, …) = f’(SNR) ≈ f(SNR’) AB CD Implementation-scenarios defined and optimized at design time

39 Bruno Bougard et al. Athens, May 2008 39 RX Opportunity: application dynamics and tolerance to inaccuracy can be propagated to the implementation Multiple link parameters trade off noise/interference robustness versus data rate Different system configurations have different requirements in [digital] signal processing accuracy  use different implementations AB CD Analog FE Digital DSP #bits TX A + noise Channel SNR SYSTEM LEVEL IMPLEMENTATION LEVEL We adapt the application fixed-point mapping at run-time By switching between the “mappings”, the average load is reduced

40 Bruno Bougard et al. Athens, May 2008 40 SDR enables more agile signal processing implementations DSP implementation Run-time controller Monitoring info Adapt Data format QoS req. Time Freq Chan Att  Several sw implementation of the same functionality with different precision/computation load  Monotonic relation between precision/load  One can switch between sw implementation in a few cycles

41 Bruno Bougard et al. Athens, May 2008 41 Dynamic fixed-point format assignment increases energy efficiency in situation requiring lower performance

42 Bruno Bougard et al. Athens, May 2008 42 Dynamic fixed-point format assignment increases energy efficiency in situation requiring lower performance

43 Bruno Bougard et al. Athens, May 2008 43 Dynamic fixed-point format assignment increases energy efficiency in situation requiring lower performance

44 Bruno Bougard et al. Athens, May 2008 44 Increase in scalability Energy efficiency increased at lower rate modes Average energy consumption is reduced

45 Bruno Bougard et al. Athens, May 2008 45 Conclusions Energy efficiency of flexible implementation closer to their dedicated hardware counterparts: –Has the potential to continuously best-fit the dynamism. Does not rely on hypothetical provision in the standards: –Implementation centric –Applicable to any functional-level algorithmic solutions Wireless systems context today but also other domains tomorrow: –Digital signal processing with an SNR type constraint and which has dynamic data resolution variation –biomedical signal processing, multimedia, etc.


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