1. Advanced Semiconductor Devices Y-BRANCH SWITCH (YBS) Anubhav Khandelwal

2. OUTLINE INTRODUCTION –Need for efficient electronic switches YBS –Principle of operation –Ballistic Transport –Characteristics –Fabrication YBS as efficient switch APPLICATIONS –Theoretical Predictions –Demonstrated devices : Diodes Transistors Schmitt Trigger Logic Gates: NAND SUMMARY

3. Need for efficient electronic switches Problem of switching bottleneck in modern communications network Need: Ultra-fast switching High packing density Low power dissipation YBS be the solution?

4. YBS: Principle of Operation Assuming Ballistic transport STEM RIGHT LEFT Fundamental limit for switching : LiLi For a YBS manufactured by etching through a GaAs/AlGaAs 2DEG, with n s =4×10 11 cm −2 and L i ~ 200 nm, ΔV s ~1 mV

5. YBS: Ballistic Transport Ballistic Transport – Branch width < Electron free wavelength V L =V O V R =-V O VCVC Classical: Ballistic: (1) PHYSICAL REVIEW B, Vol. 62, No.24, 15 DECEMBER 2000-II (1)

6. YBS: Characteristics 1.For symmetric YBS, applying +V and –V to V L and V R will always result in negative V c For asymmetric YBS, V c is negative for lVl greater than certain threshold V L =V O V R =-V O VCVC 2. (Theoretically) Possible to achieve gain without external biasing due to self coupling between the branches. (1) PHYSICAL REVIEW B, Vol. 62, No.24, 15 DECEMBER 2000-II (1)

7. YBS: Fabrication

8. YBS as efficient switch (1) APL VOLUME 83, NUMBER 12 22 SEPTEMBER 2003 1. Speed Small capacitance of central branch and small contact resistance (few kΩs). Switching at 50GHz has been demonstrated. Theoretically, self coupling in ‘gateless’ YBS result in switching at THz range 2. Size YBS with sub-100nm thick branches demonstrated. With branched nanowires, can go down further. 3. Switching energy Fundamental limit for switching (single mode coherent transport) is not Thermally limited in YBS Switching voltage in FET is Thermally limited

9. Applications Theoretical predictions Rectifier Second and higher harmonic generator Logic AND V C as a function of V L Diode if V R =0V Transistor if V R is varied

10. Reversible logic using YBS Minimum energy dissipation due to information erasure is Currently, much more than kT being dissipated IRREVERSIBLE LOGIC e.g. NAND Ideally, avoid information erasure by zero energy dissipation Practically, always some energy dissipation but REVERSIBLE LOGIC

11. Reversible logic using YBS (a)A Fredkin or “Controlled Exchange” gate based on four YBSs (b)The corresponding truth table A is the control, exchanging the inputs B and C if it is set to high. Note: It is as universal as NAND/NOR (a) (b) Erik Forsberg, “INSTITUTE OF PHYSICS PUBLISHING, Nanotechnology 15 (2004) S298–S302”

12. YBS as Diode & Transistor  Diode: V R = 0V - V L <0V, V C follows V L linearly - V L >0V, V C saturates  Triode: V C as a function of V L for different values of V R Note: Room temperature operation demonstrated on YBS etched on GaInAs/InP Heterostructure H. Q. Xu, I. Shorubalko, D. Wallin, I. Maximov, P. Omling, L. Samuelson, and W. Seifert “IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 4, APRIL 2004”

13. YBS as Schmitt-Trigger (a)SEM image of a YBS together with a schematic view of the measurement setup. A bistable mode of operation was realized by coupling the left branch to the right sidegate, i.e., Vgr=Vbl. All voltages are related to ground (b)Measurement setup in combination with the equivalent circuit of the YBS (shaded area)

14. Schmitt-Trigger characteristics Demonstration of the bistable switching characteristic in feedback mode for V bias =2.0 V. The hysteretic loop both for V bl and V br is shown vs the voltage V gl applied to the left sidegate.

15. Logic Gates using YBS: NAND (a) SEM image of a NAND logic gate realized by integration of a TBJ with a point contact and the circuit setup for characterization. H. Q. Xu, I. Shorubalko, D. Wallin, I. Maximov, P. Omling, L. Samuelson, and W. Seifert “IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 4, APRIL 2004” (b) Measured output voltage V and the corresponding input voltages V (dashed line) and V (solid line), for the NAND logic gate at room temperature. V = 10V and R=2.3M. The applied logic low and high inputs were set to 0 and 1.5 V, respectively, and the measured logic low and high outputs were set to 0.8 and 3.2 V. (c) Experimental truth table for NAND logic gate

16. SUMMARY Principle of operation, fabrication and characteristics of YBS YBS as efficient electronic switch for high speed, low power operations like in communications networks YBS as diode, transistor, schmitt trigger, NAND Reversible logic possible through YBS