1. 1 Customizable Domain-Specific Computing Proposal for NSF “Expedition in Computing” Program Point of Contact: Prof. Jason Cong cong@cs.ucla.edu Participating Universities: UCLA (lead), Rice, Ohio-State, and UC Santa Barbara (Complete list of PI/Co-PI available inside)

2. 2 Outline u Motivation u Overall approach u Research plan u Management and collaboration plan u Education and outreach plan u Deliverables and knowledge transfer u Why an expedition

3. 3 Focus: Power/Energy Efficient Computation Current Solution: Parallelization Parallelization Source: Shekhar Borkar, Intel

4. 4 Our Proposal: Beyond Parallelization – Customizable Domain-Specific Computing Parallelization Customization Adapt the architecture to application Source: Shekhar Borkar, Intel

5. 5 Motivation and Vision u A few facts   We have sufficient computing power for most applications   Each user/enterprise need high computing power for only limited tasks in his/her application-domain   Application-specific integrated circuits (ASIC) can lead to 10,000x+ better power performance efficiency, but too expensive to design and manufacture u Our vision and approach   A general, customizable platform for the given domain(s) Can be customized to a wide-range of applications in the domain with novel compilation and runtime systems Can be massively produced with cost efficiency Can be programmed efficiently u Goal: A “supercomputer-in-a-box” with 100x performance/power improvement via customization for the intended domain(s) u Analogy: Advance of civilization via specialization/customization

6. 6 Application Domains: Medical Image Processing & Hemodynamic Simulation u Medical imaging has transformed healthcare   An in vivo method for understanding disease development and patient condition   Estimated to be $100 billion/year   More powerful & efficient computation can help Fewer exposure using compressive sensing with lower sampling frequency Better clinical assessment using improved registration and segmentation algorithms to provide quantitative measures of disease (e.g., cancer) u Hemodynamic simulation   Very useful for surgical procedures involving blood flow and vasculature u Both may take hours to days to construct  Clinical requirement: 1-2 min Intracranial aneurysm reconstruction with hemodynamics Magnetic resonance (MR) angiography of an aneurysm

7. 7 compressive sensing level set methods fluid registration total variational algorithm Application Domains: Medical Image Processing Pipeline denoising registration segmentation analysis reconstruction Navier-Stokes equations

8. 8 compressive sensing level set methods fluid registration total variational algorithm Navier-Stokes equations Non-iterative, highly parallel, local & global communication sparse linear algebra, structured grid, optimization methods parallel, global communication dense linear algebra, optimization methods local communication sparse linear algebra, n-body methods, graphical models local communication dense linear algebra, spectral methods, MapReduce iterative, local or global communication dense and sparse linear algebra, optimization methods Application Domains: Medical Image Processing Pipeline denoising registration segmentation analysis reconstruction These algorithms have diverse computation & communication patterns These algorithms have diverse computation & communication patterns A single, homogeneous system cannot perform very well on all of these algorithms A single, homogeneous system cannot perform very well on all of these algorithms Need architecture customization and hardware- software co-optimization Need architecture customization and hardware- software co-optimization Include many common computation kernels (“motifs”) Include many common computation kernels (“motifs”) Applicable to other domains Applicable to other domains Bi-harmonic registration (Using the same algorithm on all platforms) CPU (Xenon 2.0 GHz) 1x ~100 W GPU (Tesla C1060) 93x ~150 W FPGA (xc4vlx100) 11x~5W 3D median filter: For each voxel, compute the median of the 3 x 3 x 3 neighboring voxels CPU (Xenon 2.0 GHz) Quick select 1x ~100 W GPU (Tesla C1060) Median of medians 70x ~140 W FPGA (xc4vlx100) Bit-by-bit majority voting 1200x ~3 W

9. 9 Customizable Heterogeneous Platform (CHP) Reconfigurable RF-I bus Reconfigurable optical bus Transceiver/receiver Optical interface Overview of the Proposed Research Domain characterization Application modeling Design once Invoke many times Domain-specific-modeling (healthcare applications) Architecture modeling

10. 10 CHP Creation – Design Space Exploration Key questions:Optimal trade-off of efficiency & customizability Which options to fix at CHP creation? Which to be set by CHP mapper? Custom instructions & accelerators  Amount of programmable fabric  Shared vs. private accelerators  Custom instruction selection  Choice of accelerators  … Custom instructions & accelerators  Amount of programmable fabric  Shared vs. private accelerators  Custom instruction selection  Choice of accelerators  … Core parameters  Frequency & voltage  Datapath bit width  Instruction window size  Issue width  Cache size & configuration  Register file organization  # of thread contexts  … Core parameters  Frequency & voltage  Datapath bit width  Instruction window size  Issue width  Cache size & configuration  Register file organization  # of thread contexts  … NoC parameters  Interconnect topology  # of virtual channels  Routing policy  Link bandwidth  Router pipeline depth  Number of RF-I enabled routers  RF-I channel and bandwidth allocation  … NoC parameters  Interconnect topology  # of virtual channels  Routing policy  Link bandwidth  Router pipeline depth  Number of RF-I enabled routers  RF-I channel and bandwidth allocation  … Customizable Heterogeneous Platform (CHP) $ $ $ $ $ $ $ $ Fixed Core Custom Core Prog Fabric Reconfigurable RF-I bus Reconfigurable optical bus Transceiver/receiver Optical interface

11. 11 CHP Mapping – Compilation and Runtime Software Systems for Customization Goal: Efficient compiler and runtime support to map domain-specific specification to customizable hardware Adapt the CHP to a given application for drastic performance/power efficiency improvement Domain-specific applications Abstract execution Programmer Domain-specific programming model (Domain-specific coordination graph and domain-specific language extensions) Source-to source CHP Mapper Application characteristics CHP architecture models C/C++ code C/C++ front-end Reconfiguring and optimizing back-end Analysis annotations Binary code for fixed & customized cores Customized target code RTL for prog fabric RTL Synthesizer (xPilot) C/SystemC behavioral spec Performance feedback Adaptive runtime Lightweight threads and adaptive configuration

12. 12 Center for Domain-Specific Computing (CDSC) Organization UCLARiceUCSBOhio State Domain-specific modeling Bui, Reinman, Potkonjak Sarkar, Baraniuk Sadayappan CHP creation Chang, Cong, Reinman Cheng CHP mapping Cong, Palsberg, Potkonjak Sarkar ChengSadayappan Application modeling Aberle, Bui, Vese Baraniuk Experimental systems All (led by Cong & Bui)All ReinmanPalsbergSadayappan Sarkar (Associate Dir) VesePotkonjak AberleBaraniukBui Cong (Director) ChengChang A diversified & highly accomplished team: 8 in CS&E; 1 in EE; 2 in medical school; 1 in applied math

13. 13 Management and Collaboration Plan u u Director: Jason Cong (UCLA), Associate Director: Vivek Sarkar (Rice)   Oversee the center operation u u Research Executive Committee (REC): leaders of 4 research thrusts + 2 directors   Monthly teleconferences to review the research progress and facilitate inter-thrust collaboration u u Each thrust will have weekly or biweekly meeting driven by research milestones   Leveraging extensive collaboration history among PI/Co-PIs Everyone had/has joint projects/publications with others in the center Everyone had/has joint projects/publications with others in the center   Inter-campus students exchanges are planned and encouraged u u Three center-wide meetings each year   January, May, and September (annual review, with guests from NSF and industry)   Research talks + poster sessions + brainstorm sessions + feedback session (at annual review)

14. 14 Milestones Year 1Year 2Year 3Year 4Year 5 Application modeling Form benchmark sets in medical imaging and hemodynamic & establish baseline results Demonstration of benchmark sets on Prototype 1a Model the benchmark sets on DSCG & DSLE and drive the CHP optimizations Demonstration of benchmark sets on optimized CHP runtime environment Evaluation of benchmark on final CHP and quantify the impact on real world clinical data Domain- specific specification Develop Domain Specific Coordination Graph (DSCG) with abstract metrics Implementation of DSCG+DSLE executable models for benchmark sets; Identification of abstract execution metrics to guide CHP exploration Refinement of DSCG+DSLE executable models for benchmark sets Public release of DSCG infrastructure and the DSCG+DSLE executable models for benchmark sets CHP creation CHP hierarchical imulation Infrastructure CHP initial design- space tuning; Domain- specific component synthesis & selection Refinement of CHP design- space exploration with detailed simulation CHP design- space exploration with full system simulation System integration CHP mapping Source-to-source CHP mapper for Prototype 1a, Fine-grained task scheduling system with locality and load balance adaptations Design of software reliability components Reconfiguring and optimizing back-end transformations; Phase-based adoptions in adaptive runtime Support of software reliability Demonstration of the full CHP mapping system on Prototypes 1a & 2 Experimental systems Initial CHP prototype with COTS components (Prototype 1a) Prototype RF-I chip (Prototype 1b) with traffic generators and multicast CHP testbed (Prototype 2) prototyping on FPGAs CHP testbed tapeout (Prototype 2) Full system integration and demonstration

15. 15 Milestones for Experimental Platforms u Prototype 1a: Heterogeneous integration of off- the-shelf CMPs + GPUs + FPGAs, e.g., u Intel Xeon CPU + Xilinx V5 FPGA (via FSB) + Nvidia Tesla GPU (via PCI-express 2.0) u Initial HW platform for CHP compilation and runtime system development u Prototype 1b: RF-interconnect prototype u RF-I implementation at 45nm CMOS with multiple digital cores/traffic generators u Performance, power, and reliability study u Prototype 2: final CHP implementation for the proposed healthcare domains u Single-chip integration or 3D integration RF-I tape-out at IBM 90nm CMOS

16. 16 Integrated Research and Education u New courses planned based on the research   “Architecture and Compilation for Domain-specific Computing”   “C omputational Techniques for Medical Imaging”   “Programming Models and Application Development for Domain-specific Computing ” With projects for new domain, e.g., scientific computing, VLSI CAD, and digital entertainment   May be jointly taught (multi-disciplinary)   Developed and shared via Connexions (cnx.org), an open-access education platform now with over 1M users/month (based at Rice) u Graduate student training   Estimated around 18 students in total in four campuses   Seminars and workshops on interdisciplinary research, career development, ethics, entrepreneurship … u Undergraduate student training   10 summer research fellowship each year, via UCLA FOCUS, Rice AGEP and similar programs u Outreach to high-school students   5-7 high-school summer scholarship each year, via UCLA SMARTS programs

17. 17 Outreach Partner: Frontier Opportunities in Computing for Underrepresented Students (FOCUS) u Aims to increase the number of under- represented minorities interested in computing disciplines u Currently has 50 underrepresented undergraduates:   23 in CS   27 in CSE u http://ceed.ucla.edu 2007 summer research poster competition The first prize winner

18. 18 Outreach Partner: Science Mathematics Achievement and Research Technology for Students (SMARTS) u A six-week summer college preparation program at UCLA   Engage underrepresented students in science, technology, engineering and math training u SMARTS activities   Course related activities Math courses (Intro to Statistics and AP Calculus Readiness) SAT preparation   Research activities u Will have CDSC faculty and graduate students involved to serve as mentors and provide projects u This year, SMARTS program has over 80 applicants   30-35 will be admitted (due to limitation of funding)

19. 19 Knowledge Transfer u Main outcome of the project 1. 1.CHP prototypes 2. 2.Compilation and runtime system for CHP mapping 3. 3.Application drivers – original source code & modified code with domain-specific modeling 4. 4.General methodology for customizable computing (mainly through publications) #1 – 3 will be shared with the research community via web as they become available u Industrial partners   Altera, IBM, Intel, Magma, Mentor Graphics, Nvidia, Xilinx   More will be contacted and included if the project is officially funded u Campus partners   UCLA Institute of Digital Research and Education (IDRE)   Institute of Pure and Applied Mathematics (IPAM)   UCLA Wireless Health Institute (WHI) u Technology transfer experience   Impact via industrial partners: IBM, Intel, Xilinx …   Startups: Aplus (acquired by Magma in 2003), AutoESL (Magma and Xilinx were investors)

20. 20 Why an Expedition u Address a fundamental problem – energy efficient computing   What’s beyond parallelization?   Our proposal – a transformative approach using customization u Many challenging research topics   Domain-specific modeling/specification   Novel architecture & microarchitecture for customization   Compilation and runtime software to support intelligent customization   New research in testing, verification, reliability, etc in customizable computing u Integrated effort in modeling, HW, SW, & application development u Demonstration in a critical application domain   Healthcare has a significant impact to economy and society   Can greatly benefit from customizable domain-specific computing