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Decoders and Encoders Sections 3-5, 3-6 Mano & Kime.

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Presentation on theme: "Decoders and Encoders Sections 3-5, 3-6 Mano & Kime."— Presentation transcript:

1 Decoders and Encoders Sections 3-5, 3-6 Mano & Kime

2 Decoders and Encoders Binary Decoders Binary Encoders
Priority Encoders

3 Decoders

4

5 3-to-8 Line Decoder

6 A 2-to-4-Line Decoder

7 Implementing a Binary Adder Using a Decoder
S(X,Y,Z) = Sm(1,2,4,7) C(X,Y,Z) = Sm(3,5,6,7)

8 Decoder Networks

9 4-input tree decoder

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11 Decoder uses

12 Decoder uses

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14 Decoders and Encoders Binary Decoders Binary Encoders
Priority Encoders

15 Binary encoders

16 A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = D4 + D5 + D6 + D7

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18 Uses of binary encoders

19 Decoders and Encoders Binary Decoders Binary Encoders
Priority Encoders

20

21 Maps of Priority Encoder

22 Logic Diagram of a 4-Input Priority Encoder

23 Uses of priority encoders

24 VHDL Example: 8-input priority encoder

25 entity pencoder is port ( x: in STD_LOGIC_VECTOR (7 downto 0); E: in STD_LOGIC; y: out STD_LOGIC_VECTOR (2 downto 0); A: out STD_LOGIC ); end pencoder;

26 architecture pencoder_arch of pencoder is
begin pe: process(x,E) variable k: integer; y <= "000"; A <= '0'; if E = '1' then for j in 0 to 7 loop if x(j) = '1' then y <= conv_std_logic_vector(j,3); A <= '1'; end if; end loop; end process pe; end pencoder_arch;

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