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Decoders and Encoders Sections 3-5, 3-6 Mano & Kime
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Decoders and Encoders Binary Decoders Binary Encoders
Priority Encoders
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Decoders
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3-to-8 Line Decoder
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A 2-to-4-Line Decoder
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Implementing a Binary Adder Using a Decoder
S(X,Y,Z) = Sm(1,2,4,7) C(X,Y,Z) = Sm(3,5,6,7)
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Decoder Networks
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4-input tree decoder
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Decoder uses
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Decoder uses
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Decoders and Encoders Binary Decoders Binary Encoders
Priority Encoders
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Binary encoders
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A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = D4 + D5 + D6 + D7
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Uses of binary encoders
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Decoders and Encoders Binary Decoders Binary Encoders
Priority Encoders
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Maps of Priority Encoder
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Logic Diagram of a 4-Input Priority Encoder
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Uses of priority encoders
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VHDL Example: 8-input priority encoder
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entity pencoder is port ( x: in STD_LOGIC_VECTOR (7 downto 0); E: in STD_LOGIC; y: out STD_LOGIC_VECTOR (2 downto 0); A: out STD_LOGIC ); end pencoder;
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architecture pencoder_arch of pencoder is
begin pe: process(x,E) variable k: integer; y <= "000"; A <= '0'; if E = '1' then for j in 0 to 7 loop if x(j) = '1' then y <= conv_std_logic_vector(j,3); A <= '1'; end if; end loop; end process pe; end pencoder_arch;
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