1. 11/11/2004Fei Hu, ELEC6970 Fall 20041 Power estimation techniques and a new glitch filtering effect modeling based on probability waveform Fei Hu Department of Electrical and Computer Engineering, Auburn University, AL 36849

2. 11/11/2004Fei Hu, ELEC6970 Fall 20042 Outline  Introduction Different Levels of power estimation  Gate-level Probabilistic Approach Signal Probability Transition probability Transition density Probability waveform  A new glitch filtering method Based on Probability waveform The idea and examples Preliminary experimental results  Summary

3. 11/11/2004Fei Hu, ELEC6970 Fall 20043 Introduction  Power estimation is critical to IC (low power) design Total power consumption must be estimated during the design phase. Helps to find the hot-spot which may lead to the failure  Levels of power estimation Transistor Level Gate Level RTL Level Behavior Level Software Level  Two approaches Simulation based Non-simulative

4. 11/11/2004Fei Hu, ELEC6970 Fall 20044 Simulation based Approach  Transistor Level Simulation Circuit level  SPICE Solving a large matrix of node current using the Krichoff’s Current Law (KCL) Basic components include resistor, capacitor, inductors, current sources and voltage sources. Diodes and transistors are modeled by basic components  PowerMill Table based device model Even driven timing simulation 2-3 orders of magnitude faster than Spice

5. 11/11/2004Fei Hu, ELEC6970 Fall 20045 Simulation basedApproach  Transistor Level Simulation -continued Switch level  Model transistor as a on-off switch with a resistor  Short circuit power can be accounted by observing the time in which the switches form a power- ground path  Gate Level Simulation Basic components, logic gates Logic simulation to find switching activity, P=1/2CV 2 f active Monte Carlo simulation, statistical method  Each sample has N Random input vector  Energy consumption has a normal distribution  Stopping criterion derived from sample average and sample standard deviation

6. 11/11/2004Fei Hu, ELEC6970 Fall 20046 Simulation basedApproach  RTL level simulation Basic components, register, adder, multiplier, etc. RT-level simulation collect input statistics of each module Macro-modeling of each component based on simulation  Simulating the component with random input  Fitting a multi-variable regression curve (power macro model equation) using a least mean square error fit.

7. 11/11/2004Fei Hu, ELEC6970 Fall 20047 High level estimation  Most of the high level power prediction use profiling and simulation techniques to address data dependencies  Behavior level estimation No much RT (or lower) level circuit structure information available Information theoretic models  Total capacitance estimated based on output entropy  Average switching activity for each line, approximated by ½ its entropy Complexity based models, “equivalent gate”  Software level estimation Energy consumption by a application program Instruction level power macromodel Profile-driven program synthesis, RT level simulation

8. 11/11/2004Fei Hu, ELEC6970 Fall 20048 Non-simulative Approach  Gate level probabilistic approach Concepts  Signal Probability  Transition probability  Transition density  Probability waveform Factors  Spatial, temporal correlation  Zero delay or real delay (glitch power)  With or w/o glitch filtering

9. 11/11/2004Fei Hu, ELEC6970 Fall 20049 Gate level probabilistic approach - concepts  Signal Probability P s (x), the fraction of clock cycles in which the steady-state value of signal x is high Spatial independence, the logic value of an input node is independent of the logic value of any other input node Under spatial independence assumption, signal probability for simple gate is:  NOT: c=a, P s (c)=1-P s (a)  AND: c=ab, P s (c)=P s (a)P s (b)  OR: c=a+b, P s (c)=1-[1-P s (a)][(1-P s (b)]

10. 11/11/2004Fei Hu, ELEC6970 Fall 200410 Signal probability w/ spatial correlation  Example  Signal correlation S. Ercolani, M. Favalli, M. Damiani, P. Olivo, and B. Ricco. Estimate of signal probability in combinational logic networks. In Proceedings of the First European Test Conference, pages 132– 138, 1989. P s (x 1,x 2 )=P s (x 1 )P s (x 2 )W x 1,x 2 Approximate higher order correlation with pairwise correlations P s (a)=0.5 P s (b)=0.5 P s (c)=0.5x0.5=0.25 ? P s (c)=0

11. 11/11/2004Fei Hu, ELEC6970 Fall 200411 Signal probability w/ spatial correlation  Global OBDD Ordered binary decision diagram corresponding to the global function of a node (function of node in terms of circuit input) Give exact signal correlation Example, function y=x 1 x 2 +x 3 P s (y)=P s (x 1 )P s (f x 1 )+P s (x 1 )P s (f x 1 ) Traversal from bottom to top to derive signal probability x1x1 x2x2 x3x3 01 1 0 0 1 0 1

12. 11/11/2004Fei Hu, ELEC6970 Fall 200412 Gate level probabilistic approach - concepts  Transition probability P t (x), average fraction of clock cycles in which the steady state value of x is different from its initial value Temporal independence, the signal value of a node at clock cycle i is independent to its signal value at clock cycle i-1 Under temporal independence assumption, transition probability P t (x)=2P s (x)[1-P s (x)]

13. 11/11/2004Fei Hu, ELEC6970 Fall 200413 Transition probability w/ spatial temporal correlations  R. Marculescu, D. Marculescu, and M. Pedram. Logic level power estimation considering spatiotemporal correlations. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 294–299, Nov. 1994.  Zero delay assumption, lag one markov chain P t (x) ≠2P s (x)[1-P s (x)]  Transition correlations Used to describe the spatial temporal correlation between two signals in consecutive clock periods TC xy (ij,mn)=P(x i->j,y m->n )/P(x i->j )P(y m->n ) i,j,m,n  {0,1}  Propagate transition probability from PI OBDD based procedure Global or local OBDD

14. 11/11/2004Fei Hu, ELEC6970 Fall 200414 Gate level probabilistic approach - concepts  Transition density D(x), average number of transitions a logic signal x makes in a unit time (one clock cycle) Boolean difference, if y is a function depending on x then and Under differential delay assumption, no two signal has transition happened at the same time. Under spatial independence assumption Considers glitch power No glitch filtering effect

15. 11/11/2004Fei Hu, ELEC6970 Fall 200415 Transition density  Example, c=ab  Depending on delay model above result can be true or false d d P s (a)=0.5 D(a)=P t (a)=2*0.5*0.5 =0.5 P s (b)=0.5 D(b)=P t (b)=2*0.5*0.5 =0.5 P(c/a)=P(b)=0.5 P(c/b)=P(a)=0.5 D(c)=0.5*D(a)+0.5*D(b) =0.5*0.5+0.5*0.5 =0.5

16. 11/11/2004Fei Hu, ELEC6970 Fall 200416 Transition density InputsNumber transition on c abZero delayUnit delay 00 00 0100 001000 001100 010011 01 00 1011 011100 100011 100111 10 02 1100 0000 110111 111011 11 00 Total68

17. 11/11/2004Fei Hu, ELEC6970 Fall 200417 Gate level probabilistic approach - concepts  Probability waveform F. N. Najm, R. Burch, P. Yang, and I. N. Hajj. CREST - a current estimator for cmos circuits. In Proceedings of IEEE International Conference on Computer-Aided Design, pages 204–207, Nov. 1988 A sequence of value indicating the probability that a signal is high for certain time interverals, and the probability that it makes low-to-high at specific time point Real delay model Propagation of probability waveform deals with probability of making transitions Transition density is the sum of all probability of transitions CREST assumes spatial independence

18. 11/11/2004Fei Hu, ELEC6970 Fall 200418 Probability waveform  Example, c=ab P t1t2 0.5 0.1 0.2 0.1 P t1t2 0.5 0.1 0.2 0.1 0 P t1t2 0.5 0.07 0.16 0.07 P c 01 (t1)=P a 01 (t1) P b 01 (t1)+ P a 01 (t1) P b 11 (t1)+ P a 11 (t1) P b 01 (t1) =0.1*0.1+0.1*0.3+0.3*0.1 =0.07 a b c P c 10 (t1)=P a 10 (t1) P b 10 (t1)+ P a 10 (t1) P b 11 (t1)+ P a 11 (t1) P b 10 (t1) =0.2*0.2+0.2*0.3+0.3*0.2 =0.16 P c 11 (t1)=P c 1 (t1-)- P c 10 (t1) P c 1 (t1+)=P c 01 (t1)+P c 11 (t1)

19. 11/11/2004Fei Hu, ELEC6970 Fall 200419 Probability waveform  Tagged Probability waveform Divide probability waveform into 4 tagged waveform depending the steady state signal values Probability waveforms are for one clock period Use transition correlation of steady state signal to approximate spatial temporal correlation between two inputs W a,b xy,wz =P a,b xy,wz /P a xy P b wz Transition correlation can be obtained from zero delay logic simulation  Bit-parallel simulation Glitch filtering effect considered

20. 11/11/2004Fei Hu, ELEC6970 Fall 200420 Tagged probability waveform  Example of decomposition P t1t2 0.5 0.1 0.2 0.1 11 t1t2 0.35 0.15 11 t1t2 0.15 0.1 0.05 01 t1t2 0.15 10 0.1 0.05 t1t2 00 0.35

21. 11/11/2004Fei Hu, ELEC6970 Fall 200421 Tagged probability waveform  Propagation of waveform Similar to untagged waveform  Two input gates, 16 combinations of tags sum up waveform with same resulting tags, 4 output waveform Example for an AND gate P c,uv 01 (t1)+=[P a,xy 01 (t1) P b,wz 01 (t1)+P a,xy 01 (t1) P b,wz 11 (t1)+P a,xy 11 (t1) P b,wz 01 (t1)] * W a,b xy,wz P c,uv 10 (t1)+=[P a,xy 10 (t1) P b,wz 10 (t1)+P a,xy 10 (t1) P b,wz 11 (t1)+P a,xy 11 (t1) P b,wz 10 (t1)] * W a,b xy,wz uv, xy, wz are tags, (00,01,10,11) uv = xy and wz here

22. 11/11/2004Fei Hu, ELEC6970 Fall 200422 Tagged probability waveform  Glitch filtering scheme If pulse width less than gate inertial delay, it is subject to glitch filtering For time t1 for at time point t2, t2-t1<d P c,uv 01 (t1)-= P a,xy 01 (t1) P b,wz 10 (t2)W a,b xy,wz P c,uv 10 (t2)-= P a,xy 01 (t1) P b,wz 10 (t2)W a,b xy,wz Limitations  Rough filtering, Not exact description for pulse  Can’t filter glitch coming from one input

23. 11/11/2004Fei Hu, ELEC6970 Fall 200423 A new glitch filtering scheme  Why important Glitch power can be a significant portion of total switching power Bad filtering scheme gave errors  Basic idea: look at the exact condition for a pulse P(c has transition at t1 and t2)=P(a has 0->1 at t1, b has 1->0 at t2) Tagged waveform was correct ? 0 t1 t2 t1t2 a b c

24. 11/11/2004Fei Hu, ELEC6970 Fall 200424 New glitch filtering scheme  In probability waveform (spatial independence) P(c has 0->1 transition at t1 and 1->0 at t2)= P{(a,b) at t1 is (01,11) or (11,01) or (01,01) and (a,b) at t2 is (10,11) or (11,10) or (10,10)} P t1t2 0.5 0.1 0.2 0.1 P t1t2 0.5 0.1 0.2 0.1 P t1t2 0.5 0.1 0.2 0.1 P t1t2 0.5 0.1 0.2 0.1 0 P t1t2 0.5 0.07 0.16 0.07 a b c

25. 11/11/2004Fei Hu, ELEC6970 Fall 200425 New glitch filtering a011101 b1101 t1 t2 a101110 b1110 a01,1001,1101,1011,1011,1111,1001,1001,1101,10 b11,1111,10 01,1101,10 01,1101,10 t1,t2 P c 01,10 (t1,t2) is a sum of 9 terms Example term: P a 01,10 (t1,t2)P b 11,11 (t1,t2) This sum P c 01,10 (t1,t2) is subtracted from P c 01 (t1), P c 10 (t2) Similarly, P c 10,01 (t1,t2) is subtracted from P c 10 (t1), P c 01 (t2) and

26. 11/11/2004Fei Hu, ELEC6970 Fall 200426 New glitch filtering  Keep track of P c ij,kl (t1,t2) for every signal during the waveform propagation in the form of correlation coefficient w c ij,kl (t1,t2)= P c ij,kl (t1,t2)/P c ij (t1) P c kl (t2)  After the filtering If t2-t1<d  P c 01,10 (t1,t2) set to 0  P c 01,11 (t1,t2) set to P c 01 (t1)  … Otherwise  P c ij,kl (t1,t2) = w c ij,kl (t1,t2)* P’ c ij (t1) P’ c kl (t2)  P’ c ij (t1), P’ c kl (t2) are probability of transition at t1,t2 after filtering

27. 11/11/2004Fei Hu, ELEC6970 Fall 200427 New glitch filtering scheme  In tagged probability waveform Consider spatial correlation  Approximate spatial correlation with steady state signal transition correlations, W ab xy,wz P c,uv 01,10 (t1,t2) is a sum of sub-sum of 9 terms Each sub-sum is corresponding to a pair of input waveform Example term in sub-sum P a,xy 01,10 (t1,t2)P b,wz 11,11 (t1,t2)*W ab xy,wz P c,uv 01,10 (t1,t2) is subtracted from P c,uv 01 (t1), P c,uv 10 (t2) if t2-t1<d Similarly, P c,uv 10,01 (t1,t2) is subtracted from P c,uv 10 (t1), P c,uv 01 (t2)

28. 11/11/2004Fei Hu, ELEC6970 Fall 200428 Preliminary experimental results  Small circuit with tree structure No spatial correlations Randomly specified delay Input signal probability =0.5 Results by probability waveform compared to logic simulation under random input vectors

29. 11/11/2004Fei Hu, ELEC6970 Fall 200429 Preliminary results – tree circuit Node time interval Logic Simulator Prob Wave + new Errors %TagTag + new 17(2,2)0.457010.46080.83%0.4605760.78%0.4605760.78% 18(4,4)0.459910.46080.19%0.4602770.08%0.4602770.08% 19(2,2)0.460430.46080.08%0.460390.01%0.460390.01% 20(5,5)0.461930.46080.24%0.4603730.34%0.4603730.34% 21(2,2)0.462220.46080.31%0.4606880.33%0.4606880.33% 22(6,6)0.461840.46080.23%0.4603960.31%0.4603960.31% 23(2,2)0.461040.46080.05%0.4610460.00%0.4610460.00% 24(3,3)0.458480.46080.51%0.4600520.34%0.4600520.34% 25(3,5)0.585810.5898240.69%0.5897910.68%0.5897910.68% 26(5,8)0.485630.4836560.41%0.4837750.38%0.4837750.38% 27(4,8)0.592250.5898240.41%0.5898890.40%0.5898890.40% 28(4,5)0.483320.4836560.07%0.4838140.10%0.4838140.10% 29(4,9)0.604930.6059510.17%0.6052260.05%0.6052260.05% 30(7,11)0.326170.3248930.39%0.3243050.57%0.3243050.57% 31(7,12)0.498690.4819713.35%0.60522621.36%0.4815513.44% 32(8,12)0.326170.3248930.39%0.3243050.57%0.3243050.57% 33(10,15)0.467030.4578381.97%0.54622416.96%0.4563862.28% total 8.052868.02890.30%8.236352.28%8.022840.37% Standard Deviation 0.84% 6.31% 0.89% Average 0.60% 2.55% 0.63%

30. 11/11/2004Fei Hu, ELEC6970 Fall 200430 Preliminary results – reconvergent fanout  Small circuit with reconvergent fanout Introduce spatial correlations Randomly specified delay Input signal probability =0.5 Results by probability waveform compared to logic simulation under random input vectors

31. 11/11/2004Fei Hu, ELEC6970 Fall 200431 Preliminary results – reconvergent fanout Node time interval Logic Simulator Prob Wave + newErrors %TagTag + new 25(3,5)0.585810.5898240.69%0.5897910.7%0.5897910.7% 26(5,8)0.485630.4836560.41%0.4837750.4%0.4837750.4% 27(4,8)0.592250.5898240.41%0.5898890.4%0.5898890.4% 28(4,5)0.483320.4836560.07%0.4838140.1%0.4838140.1% 29(4,9)0.604930.6059510.17%0.6052260.0%0.6052260.0% 30(5,9)0.490290.4906750.08%0.490810.1%0.490810.1% 31(7,11)0.326170.3248930.39%0.3243050.6%0.3243050.6% 32(7,12)0.498690.4819713.35%0.60522621.4%0.4815513.4% 33(8,12)0.326170.3248930.39%0.3243050.6%0.3243050.6% 34(8,15)0.294950.19608433.52%0.2841863.6%0.270018.5% 35(6,13)0.478790.4641043.07%0.4513585.7%0.4513585.7% 36(8,17)0.475570.54916315.47%0.53557212.6%0.5068326.6% Total(2,18)9.325439.271090.58%9.452051.4%9.285460.4% Std Dev 7.96% 5.37% 2.50% Avg 3.02% 2.42% 1.46%

32. 11/11/2004Fei Hu, ELEC6970 Fall 200432 Preliminary results – benchmark circuits  ISCAS 85’ benchmark  Input signal probability 0.5  Logic simulation 40,000 random vectors  Error statistics Large percentage error for low activity node – exclude error for node activity less than 0.1 Total energy estimated from transition density and load capacitance. C L is proportional to fanout of a gate

33. 11/11/2004Fei Hu, ELEC6970 Fall 200433 CircuitErrors Prob wave + newTagTag + new Avg node error8.16%6.10%5.32% c880Std Dev9.31%9.64%8.11% Totoal energy7.26%1.64%5.93% Avg node error15.16%22.99%4.65% c1355Std Dev15.95%25.71%6.47% Totoal energy18.33%32.85%5.43% Avg node error14.34%10.66%11.49% c1908Std Dev20.01%19.42%19.29% Totoal energy19.66%4.09%11.19% Avg node error15.22%12.65%11.98% c2670Std Dev16.42%15.98%14.15% Totoal energy15.03%7.24%9.93% Avg node error14.08%16.29%6.60% c3540Std Dev19.24%26.08%11.31% Totoal energy10.08%9.78%2.42% Avg node error13.06%8.14%7.72% c5315Std Dev14.87%10.26%10.62% Totoal energy17.24%2.29%10.07% Avg node error23.67%28.62%12.76% c6288Std Dev13.52%22.94%11.11% Totoal energy26.37%32.12%4.05% Avg node error17.62%12.40%11.42% c7552Std Dev25.76%20.25%18.61% Totoal energy16.39%3.17%7.78%

34. 11/11/2004Fei Hu, ELEC6970 Fall 200434 Preliminary results – benchmark circuits  Observations Single probability waveform does not perform better than “Tag + new” for benchmark circuits New glitch filtering improves node error std dev. – error more even distributed New glitch filtering improves overall and node estimation accuracy in some cases In some other case, it tends to give worse total energy estimation  Filtering is based on tagged probability waveform  Waveform before filtering is underestimated, a correct amount of subtraction by filtering effect will lead to overall underestimated value  “Tag” tends to underestimate the amount of subtraction by filtering effect Estimation speed  “Prob + new” – 10~30 times speed up comparing to logic simulation  “Tag” – 200 times speed up  “Tag + new” – 1~5 speed up

35. 11/11/2004Fei Hu, ELEC6970 Fall 200435 Future work  Improve the estimation accuracy by improving the estimation of waveform before filtering Need to consider more on spatial correlations Take care of special case that spatial correlation between two signal is poorly approximated by steady state transition correlation  Improving the estimation speed The new method of glitch filtering take too much time because of it’s propagation of P c ij,kl (t1,t2)  Only 1~5 times speed up than logic simulation  Software optimization has to be done

36. 11/11/2004Fei Hu, ELEC6970 Fall 200436 Summary  Introductions to different Levels of power estimation  Gate-level Probabilistic Approach Signal Probability Transition probability Transition density Probability waveform  A new glitch filtering method Based on Probability waveform A more accurate glitch filtering Preliminary experimental results shows the potential of the new method Problems are to be tackled  Questions ?

37. 11/11/2004Fei Hu, ELEC6970 Fall 200437 Thank You ! For questions and comments, please contact me at hufei01@auburn.edu hufei01@auburn.edu