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Status – Week 283 Victor Moya. 3D Graphics Pipeline Akeley & Hanrahan course. Akeley & Hanrahan course. Fixed vs Programmable. Fixed vs Programmable.

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Presentation on theme: "Status – Week 283 Victor Moya. 3D Graphics Pipeline Akeley & Hanrahan course. Akeley & Hanrahan course. Fixed vs Programmable. Fixed vs Programmable."— Presentation transcript:

1 Status – Week 283 Victor Moya

2 3D Graphics Pipeline Akeley & Hanrahan course. Akeley & Hanrahan course. Fixed vs Programmable. Fixed vs Programmable. OpenGL Machine OpenGL Machine

3 3D Graphics Pipeline

4 Application: Simulation, Input event handlers, modify data structures, database traversal, primitive generation, utility functions. Application: Simulation, Input event handlers, modify data structures, database traversal, primitive generation, utility functions. Command: command buffering, command interpretation, unpack and perform format conversion, mantain graphics state. Command: command buffering, command interpretation, unpack and perform format conversion, mantain graphics state. Geometry: evaluation of polynomials for curved surfaces, transform and projection, clipping, culling and primitive assembly. Geometry: evaluation of polynomials for curved surfaces, transform and projection, clipping, culling and primitive assembly.

5 Geometry Vertex operations: Vertex operations: (1) Transform coordinates and normal (1) Transform coordinates and normal Model => World. Model => World. World => Eye. World => Eye. (2) Normalize the length of the normal. (2) Normalize the length of the normal. (3) Compute vertex lightning. (3) Compute vertex lightning. (4) Transform texture coordinates. (4) Transform texture coordinates. (5) Transform coordinates to clip coordinates (projection). (5) Transform coordinates to clip coordinates (projection). (8) Divide coordinate by w. (8) Divide coordinate by w. (9) Apply affine viewport transform (x, y, z). (9) Apply affine viewport transform (x, y, z).

6 Geometry Primitive operations: Primitive operations: (6) Primitive assembly (6) Primitive assembly (7) Clipping: (7) Clipping: (10) Backface cull: eliminate back-facing triangles. (10) Backface cull: eliminate back-facing triangles. Primitive generation: new pipeline stage (ATI TruForm). Primitive generation: new pipeline stage (ATI TruForm).

7 Rasterization Setup (per-triangle). Setup (per-triangle). Sampling (triangle = {fragments}. Sampling (triangle = {fragments}. Interpolation (interpolate colors and coordinates). Interpolation (interpolate colors and coordinates).

8 Rasterization Converts primitives to fragments. Converts primitives to fragments. Primitive: point, line, polygon, … Primitive: point, line, polygon, … Fragment: transient data structure Fragment: transient data structure short x, y; long depth; short r, g, b, a; Fragment selection. Fragment selection. Parameter Assignment (color, depth...). Parameter Assignment (color, depth...).

9 Texture Texture transformation and projection. Texture transformation and projection. Texture address calculation. Texture address calculation. Texture filtering. Texture filtering.

10 Fragment Texture combiners and fog. Texture combiners and fog. Owner, scrissor, depth, alpha and stencil tests. Owner, scrissor, depth, alpha and stencil tests. Blending or compositing. Blending or compositing. Dithering and logical operations. Dithering and logical operations.

11 Display Gamma correction. Gamma correction. Analog to digital conversion. Analog to digital conversion.

12 Programmable Pipeline

13 Vertex Program

14

15 Fragment Program

16

17 Some real examples ATI R300. ATI R300. 3DLabs P10. 3DLabs P10. Matrox Parhelia. Matrox Parhelia.

18 ATI R300. Specs 0.15 micron technology 0.15 micron technology 110+ million transistors. 110+ million transistors. 8 pixel rendering pipelines, 1 texture unit per pipeline, 16 textures per pass. 8 pixel rendering pipelines, 1 texture unit per pipeline, 16 textures per pass. 4 programmable vect4 vertex shader pipelines. 4 programmable vect4 vertex shader pipelines. 256-bit DDR memory bus. 256-bit DDR memory bus. Up to 256 MB of memory on board, clocket at over 300 MHz (19,2 GB/s). Up to 256 MB of memory on board, clocket at over 300 MHz (19,2 GB/s). AGP8X. AGP8X. Full DirectX 9 Pixel and Vertex Shader support. Full DirectX 9 Pixel and Vertex Shader support.

19 ATI R300. Specs.

20 ATI R300. GPU.

21 ATI R300. Memory Crossbar.

22 ATI R300. Vertex Shader.

23 ATI R300. Pixel Shader.

24

25 3D Labs P10. Specs. 0.15-micron manufacturing process (same process as the GeForce4) 0.15-micron manufacturing process (same process as the GeForce4) 76M transistors 76M transistors Fabbed at TSMC (NVIDIA's chips are made here as well) Fabbed at TSMC (NVIDIA's chips are made here as well) 860 ball HSBGA package (TSMC's latest packaging technology) 860 ball HSBGA package (TSMC's latest packaging technology) 4 pixel rendering pipelines, can process two textures per pipeline 4 pixel rendering pipelines, can process two textures per pipeline 256-bit DDR memory interface (up to 20GB/s of memory bandwidth w/ 312.5MHz DDR) 256-bit DDR memory interface (up to 20GB/s of memory bandwidth w/ 312.5MHz DDR) up to 256MB of memory on-board up to 256MB of memory on-board AGP 4X support AGP 4X support Full DX8 pixel and vertex shader support Full DX8 pixel and vertex shader support

26 3DLabs P10. Evolution.

27 3DLabs P10. Pipeline.

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29 3DLabs. Command.

30 3DLabs. Vertex Units.

31 3DLabs P10. Raster Pipe.

32 3DLabs P10. Texture Pipe.

33 3DLabs P10. Pixel Pipe.

34 3DLabs P10. Virtual Memory.

35 Matrox Parhelia. Specs. 0.15-micron GPU manufactured at UMC 0.15-micron GPU manufactured at UMC 80 Million transistors 80 Million transistors 4 pixel rendering pipelines, can process four textures per pipeline per clock 4 pixel rendering pipelines, can process four textures per pipeline per clock 4 programmable vect4 vertex shaders 4 programmable vect4 vertex shaders 256-bit DDR memory bus (up to 20GB/s of memory bandwidth w/ 312.5MHz DDR) 256-bit DDR memory bus (up to 20GB/s of memory bandwidth w/ 312.5MHz DDR) up to 256MB of memory on board up to 256MB of memory on board AGP 4/8X support AGP 4/8X support Full DX8 pixel and vertex shader support Full DX8 pixel and vertex shader support

36 Matrox Parhelia. Pipeline.

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