1. 1 CS 501 Spring 2005 CS 501: Software Engineering Lecture 22 Performance of Computer Systems

2. 2 CS 501 Spring 2005 Administration

3. 3 CS 501 Spring 2005 Performance of Computer Systems In most computer systems The cost of people is much greater than the cost of hardware Yet performance is important Future loads may be much greater than predicted A single bottleneck can slow down an entire system

4. 4 CS 501 Spring 2005 Predicting Performance Change: Moore's Law Original version: The density of transistors in an integrated circuit will double every year. (Gordon Moore, Intel, 1965) Current version: Cost/performance of silicon chips doubles every 18 months.

5. 5 CS 501 Spring 2005 Moore's Law: Rules of Thumb Planning assumptions: Every year: cost/performance of silicon chips improves 25% cost/performance of magnetic media improves 30% 10 years = 100:1 20 years = 10,000:1

6. 6 CS 501 Spring 2005 Moore's Law and System Design Design system: 2005 Production use: 2008 Withdrawn from production: 2018 Processor speeds: 1 1.9 28 Memory sizes: 1 1.9 28 Disk capacity: 1 2.2 51 System cost: 1 0.40.01

7. 7 CS 501 Spring 2005 Moore's Law Example Will this be a typical personal computer? 2005 2018 Processor 2 GHz50 GHz Memory512 MB 14 GB Disc 50 GB 2 TB Network100 Mb/s1 Gb/s Surely there will be some fundamental changes in how this this power is packaged and used.

8. 8 CS 501 Spring 2005 Parkinson's Law Original: Work expands to fill the time available. (C. Northcote Parkinson) Planning assumptions: (a) Demand will expand to use all the hardware available. (b) Low prices will create new demands. (c) Your software will be used on equipment that you have not envisioned.

9. 9 CS 501 Spring 2005 False Assumptions from the Past Unix file system will never exceed 2 Gbytes (2 32 bytes). AppleTalk networks will never have more than 256 hosts (2 8 bits). GPS software will not last 1024 weeks. Nobody at Dartmouth will ever earn more than $10,000 per month. etc., etc.,.....

10. 10 CS 501 Spring 2005 Moore's Law and the Long Term 1965 What level? 2005

11. 11 CS 501 Spring 2005 Moore's Law and the Long Term 1965 When? What level? 2005? Within your working life?

12. 12 CS 501 Spring 2005 Predicting System Performance Mathematical models Simulation Direct measurement Rules of thumb All require detailed understanding of the interaction between software and hardware systems.

13. 13 CS 501 Spring 2005 Understand the Interactions between Hardware and Software Example: execution of http://www.cs.cornell.edu/ Client Servers domain name service TCP connection HTTP get

14. 14 CS 501 Spring 2005 Understand the Interactions between Hardware and Software :Thread:Toolkit:ComponentPeertarget:HelloWorld run callbackLoop handleExpose paint

15. 15 CS 501 Spring 2005 DecompressStream audioStream video fork join start state stop state Understand Interactions between Hardware and Software

16. 16 CS 501 Spring 2005 Look for Bottlenecks Possible areas of congestion Network load Database access how many joins to build a record? Locks and sequential processing CPU performance is rarely a factor, except in mathematical algorithms. More likely bottlenecks are: Reading data from disk (including paging) Moving data from memory to CPU

17. 17 CS 501 Spring 2005 Look for Bottlenecks: Utilization utilization = mean service time mean inter-arrival time When the utilization of any hardware component exceeds 30%, be prepared for congestion. Peak loads and temporary increases in demand can be much greater than the average. Utilization is the proportion of the capacity of a service that is used on average.

18. 18 CS 501 Spring 2005 Mathematical Models: Queues arrivewait in lineservicedepart Single server queue

19. 19 CS 501 Spring 2005 Queues arrivewait in line service depart Multi-server queue

20. 20 CS 501 Spring 2005 Mathematical Models Queueing theory Good estimates of congestion can be made for single- server queues with: arrivals that are independent, random events (Poisson process) service times that follow families of distributions (e.g., negative exponential, gamma) Many of the results can be extended to multi-server queues.

21. 21 CS 501 Spring 2005 Behavior of Queues: Utilization mean delay utilization 10

22. 22 CS 501 Spring 2005 Fixing Bad Performance If a system performs badly, begin by identifying the cause: Instrumentation. Add timers to the code. Often this will reveal that the delays are centered in one specific part of the system. Test loads. Run the system with varying loads, e.g., high transaction rates, large input files, many users, etc. This may reveal the characteristics of when the system runs badly. Design and code reviews. Have a team review the system design and suspect sections of code for performance problems. This may reveal an algorithm that is running very slowly, e.g., a sort, locking procedure, etc. Fix the underlying cause or the problem will return!

23. 23 CS 501 Spring 2005 Techniques for Eliminating Bottlenecks Serial and Parallel Processing Single thread v. multi-thread e.g., Unix fork Granularity of locks on data e.g., record locking Network congestion e.g., back-off algorithms

24. 24 CS 501 Spring 2005 Measurements on Operational Systems Benchmarks: Run system on standard problem sets, sample inputs, or a simulated load on the system. Instrumentation: Clock specific events. If you have any doubt about the performance of part of a system, experiment with a simulated load.

25. 25 CS 501 Spring 2005 Techniques: Simulation Model the system as set of states and events advance simulated time determine which events occurred update state and event list repeat Discrete time simulation: Time is advanced in fixed steps (e.g., 1 millisecond) Next event simulation: Time is advanced to next event Events can be simulated by random variables (e.g., arrival of next customer, completion of disk latency)

26. 26 CS 501 Spring 2005 Timescale Operations per second CPU instruction:1,000,000,000 Disk latency: 60 read: 25,000,000 bytes Network LAN: 10,000,000 bytes dial-up modem: 6,000 bytes

27. 27 CS 501 Spring 2005 Case Study: Performance of Disk Array When many transaction use a disk array, each transaction must: wait for specific disk platter wait for I/O channel signal to move heads on disk platter wait for I/O channel pause for disk rotation read data Close agreement between: results from queuing theory, simulation, and direct measurement (within 15%).