1. Viterbi Decoder: Presentation #5 M1 Overall Project Objective: Design a high speed Viterbi Decoder Stage 5: 18 th Feb. 2004 Component layout Design Manager: Yaping Zhan Omar Ahmad Prateek Goenka Saim Qidwai Lingyan Sun

2. Status 18-525, Integrated Circuits Design Project Design Proposal (Done) Architecture Proposal (Done) Gate level Design(Done) Component Layout (DRC & LVS): (Done) basic components: 100% functional blocks: 100% To be done: Component Simulation: (10%) Chip Layout Spice Simulation of Entire Chip

3. Schematic: top level 18-525, Integrated Circuits Design Project Viterbi Decoder clk rst In_valid In_data Out_valid Out_data BCU ACS Trace Back ML Search

4. Floorplan Goal: High speed clk rst clk rst clk rst clk rst In_validIn_data out_dataout_valid 334 624

5. Underneath 18-525, Integrated Circuits Design Project

6. Primitive Gates INVXORAND 18-525, Integrated Circuits Design Project

7. 1-Bit Register 18-525, Integrated Circuits Design Project

8. 1-Bit Full Adder 18-525, Integrated Circuits Design Project

9. 1-Bit Half Adder 18-525, Integrated Circuits Design Project

10. 8-Bit Register 18-525, Integrated Circuits Design Project

11. 8-Bit Adder 18-525, Integrated Circuits Design Project

12. 8 bit 2:1 Mux 18-525, Integrated Circuits Design Project

13. 8 bit Comparator 18-525, Integrated Circuits Design Project

14. Multiplier 18-525, Integrated Circuits Design Project

15. BCU 18-525, Integrated Circuits Design Project clk rst In_valid Data_in out0 out1 out2 out3 out4 out5 out6 out7 out8 out9 out10 out11 out12 out13 out14 out15

16. ACS 18-525, Integrated Circuits Design Project clk rst In0 In1 In2 In3 In4 In5 In6 In7 In8 In9 In10 In11 In12 In13 In14 In15 out0 t0 out1 t1 out2 t2 out3 t3 out4 t4 out5 t5 out6 t6 out7 t7

17. ML Search 18-525, Integrated Circuits Design Project clk rst in0 in1 in2 in3 in4 in5 in6 in7 min

18. Trace Back 18-525, Integrated Circuits Design Project clkrst t0 t1 t2 t3 t4 t5 t6 t7 s0 s1 s2 s3 s4 s5 s6 s7

19. Top level BCU ACS ML Search Trace Back 18-525, Integrated Circuits Design Project

20. Major Component Measurements ComponentDimensions (LXW)(µm) 8 bit Adder40 x 16 8 bit Register36 x 9 Multiplier14 x 25 8 bit Mux37 x 8 8 bit Comparator42 x 11 Total Transistor Count: 21,572 18-525, Integrated Circuits Design Project

21. Questions? 18-525, Integrated Circuits Design Project