1. Example: Given a 4-bit input combination N=N 3 N 2 N 1 N 0, this function produces a 1 output for N=1,2,3,5,7,11,13, and 0 otherwise.  According to the descriptions of a circuit logic function, write the truth table. 4.3 Combinational-Circuit Synthesis ReturnNext 1. Approach to Circuit Designs  Transform the truth table into logic expression.  Simplify or transform the logic expression, and then draw the logic circuit diagram. 2. Circuit Descriptions  The description is a list of input combinations.

2. 4.3 Combinational-Circuit Synthesis NextBackReturn Examples: (P215-217)  The description is a word or sentence, called “ natural ” logic expression. Such a description need to be translated into algebraic expressions.

3. 4.3 Combinational-Circuit Synthesis NextBackReturn 3. Circuit Manipulations NAND and NOR gates are faster than ANDs and ORs in most technologies. So, we need ways to translate descriptions using AND, OR, and NOT gates into other forms.  We can obtain an equivalent sum-of-products expression for any logic expression. It may be realized directly with AND and OR gates. The inverters required for complemented inputs are not included.  An AND-OR circuit converts into a NAND-NANDs

4. 4.3 Combinational-Circuit Synthesis NextBackReturn  We may insert a pair of inverters between AND- gate output and the corresponding OR-gate input in a two-level AND- OR circuit.

5. 4.3 Combinational-Circuit Synthesis NextBackReturn (See P219)  An OR-AND circuit converts into a NOR-NORs 4. Combinational-Circuit Minimization  The methods to minimize a combinational circuit classified two types:  Algebraic method.  Karnaugh map method. Minimization using the algebraic method is difficult to find terms that can be combined in a jumble of algebraic symbols.

6. We can apply this algebraic method repeatedly to combine minterms 1,3,5,7 of the prime-number detector. Most algebraic methods are based on a generalization of the combining theorems, T10 and T10 ’ :  given product term · y+ given product term · y = given product term  (given sum term+y) · (given sum term+y ) = given sum term 4.3 Combinational-Circuit Synthesis NextBackReturn

7. 4.3 Combinational-Circuit Synthesis NextBackReturn

8. 4.3 Combinational-Circuit Synthesis NextBackReturn 5. Karnaugh Maps A Karnaugh Map is a graphical representation of a logic function’s truth table. 32 10 y x 0 1 y x x 6754 2310 yz x 00 01 11 10 0 1 z y 101198 14151312 6754 2310 yz wx 00 01 11 10 00 01 11 10 y x z w Gray Code

9. 4.3 Combinational-Circuit Synthesis NextBackReturn 6. Minimizing Sums of Products Examples. 11 11 yz x 00 01 11 10 0 1 Simplify the following logic function: (1) F=∑ x,y,z (1,2,5,7) 11 11 yz x 00 01 11 10 0 1 1

10.  In every product term a variable dose not appear if it appears both as 0 and 1 in the set of 1-cells. 4.3 Combinational-Circuit Synthesis NextBackReturn  A set of 2 i 1-cells may be combined to form a product term containing n-i literals.  In every product term a variable is complemented if it appears only as 0 in all of the 1-cells.  In every product term a variable is uncomplemented if it appears only as 1 in all of the 1-cells.

11. 4.3 Combinational-Circuit Synthesis NextBackReturn  The number of 1s in the circled rectangular set must be 2 i.  A circled rectangular set of 1s must include a new minterm(not be circled). yz 11 11 x 00 01 11 10 0 1 11 11 yz x 00 01 11 10 0 1 1 1 1 11 111 11 yz wx 00 01 11 10 00 01 11 10

12.  A circled rectangular should be the largest possible set of 1s. 4.3 Combinational-Circuit Synthesis NextBackReturn 1 1 1 111 11 yz wx 00 01 11 10 00 01 11 10 1 11 111 1 111 yz wx 00 01 11 10 00 01 11 10

13. 4.3 Combinational-Circuit Synthesis NextBackReturn  All the product term of 1s must be circled once at least. 11 11 yz x 00 01 11 10 0 1  A minimal sum of a logic function F(x1, …,xn) is a sum-of-products expression for F such that no sum-of-products expression for F has fewer product terms, and any sum-of-products expression with the same number of product terms has at least as many literals.

14. 4.3 Combinational-Circuit Synthesis NextBackReturn Example It isn’t a minimal sum. It can be simplified as  A logic function P (x1, …,xn) implies a logic function F (x1, …,xn) if for every input combination such that P=1, then F=1 also. Example Then, P implies F, or F includes P, or F covers P, or P  F. Suppose

15. When P=1, F maybe not 1. So P does not imply F. The same as y is removed from P. So P is a prime implicant of F. Then, P implies F. But if the variable x or y is removed from P, e.g. if x is removed from P, Suppose 4.3 Combinational-Circuit Synthesis  A prime implicant of a logic function F(x1, …,xn) is a normal product term P(x1, …,xn) that implies F, such that if any variable is removed from P, then the resulting product term does not imply F. Example NextBackReturn

16. 4.3 Combinational-Circuit Synthesis  Prime-Implicant Theorem: A minimal sum is a sum of prime implicant which is called complete sum. NextBackReturn 1 11 11 11 yz wx 00 01 11 10 00 01 11 10 Prime implicants Not a prime implicant Minimal sum

17. 4.3 Combinational-Circuit Synthesis  A distinguished 1-cell of a logic function is an input combination that is covered by only one prime implicant. NextBackReturn 00 01 11 10 1 1 11 111 11 yz wx 00 01 11 10  An essential prime implicant of a logic function is a prime implicant that covers one or more distinguished 1-cell. Distinguished 1-cell Not an essential prime implicant

18.  Given two prime implicants P and Q in a reduced map, P is said to eclipse Q if P covers at least all the 1-cells covered by Q. 4.3 Combinational-Circuit Synthesis  Reduce map is obtained by removing the essential prime implicant and the 1- cells they cover. NextBackReturn 00 01 11 10 1 11 1 11 11 yz wx 00 01 11 10 1 yz 00 01 11 10 wx 00 01 11 10 1

19.  The two 1-cells in the reduced map are covered only by x.y.z is a secondary essential prime implicant. 4.3 Combinational-Circuit Synthesis NextBackReturn 11 00 01 11 10 yz wx 00 01 11 10 1 1 00 01 11 10 11 1 1 yz wx 00 01 11 10

20. 0 00 01 11 10 0 00 00 0000 yz wx 00 01 11 10 4.3 Combinational-Circuit Synthesis NextBackReturn 7. Simplifying Products of Sums Using the principle of duality, we can minimize product-of-sums expressions by looking at the 0s on a Karnaugh map. Each 0 on the map corresponds to a maxterm in the canonical product of the logic function. Writing sum terms correspond-ing to circled sets of 0s, in order to find a minimal product.

21. 4.3 Combinational-Circuit Synthesis NextBackReturn 7. Simplifying Products of Sums 1 00 01 11 10 1 11 11 1111 yz wx 00 01 11 10 Another way: The first step is to complement F to obtain F, next find a minimal sum for F, finally, complement the result using the generalized DeMorgan ’ s theorem, F=F.

22. 4.3 Combinational-Circuit Synthesis NextBackReturn 8. “Don’t-Care” Input Combinations Don’t-cares: Sometimes the specification of a combinational circuit is such that its output doesn ’ t matter for certain input combinations, called don ’ t-cares. Example: Prime BCD-digit detector. yz d 1 d 00 01 11 10 d dd d 1 111 wx 00 01 11 10

23. 4.3 Combinational-Circuit Synthesis NextBackReturn 9. Multiple-Output Minimization Most practical combinational logic circuits require more than one output.  Example yz 11 1 x 00 01 11 10 0 1 111 x 00 01 11 10 0 1 yz

24. We can also find a pair of sum-of-products expressions that share a product term, such that the resulting circuit has one fewer gate than our original design. 4.3 Combinational-Circuit Synthesis NextBackReturn

25. 4.3 Combinational-Circuit Synthesis yz 11 1 x 00 01 11 10 0 1 111 x 00 01 11 10 0 1 yz BackReturn