2. Chapter 2 An Introduction to the 80x86 Microprocessor Family Objectives: Real-mode and protected-mode operation The register set of 80x86 family The addressing capabilities and data types that may be used EE314 Microprocessor Systems Based on "An Introduction to the Intel Family of Microprocessors" by James L. Antonakos

3. 2.2 Real mode and Protected mode operation Addressable memory: 8086 20 address lines => 1MB (Mega Byte) Pentium 32 address lines => 4096MB For compatibility, all the 80x86 family members start running in “Real Mode”, emulating the 8086 features (i.e. 1MB RAM) Beginning with 80286, the “Protected Mode” is also available, allowing direct control of all address lines (all addressable memory), multitasking support, virtual memory addressing, memory management and protection (against violation from other task), control over internal data and instruction cache.

4. 2.3 The Software Model of 80x86 Family 15... 8,7... 0 31...... 16,15... 8,7... 0 32 bit registers, 80386 or higher only Accumulator Base Count Data Base Pointer Source Index Destination Index 8 bit registers16 bit registers Code Segment Data Segment Stack Segment Extra Segment Instruction Pointer Stack Pointer Flags Extended registers, only on 80386 and higher CPUs FS GS

5. 2.4 Processor Registers A000 + 5F00 A5F00 Shift to left 4 bits Add Effective Address (20bits) 16 bit Segment = a 64kbyte memory block beginning at a multiple by 10H address. An effective address is generated as combination between a segment register and another register as in the example. Each segment register has a default usage (class of instructions where apply). Multiply, divide, accessing I/O... Counter in loop operations Multiply, divide, pointer to I/O... Source index in string operations... Destination index in string operations Pointer in program flow Pointer in Stack Control and status flags A prefix (66H) allows using 32 bit registers in the real mode: db 66h ;EAX instead AX mov ax,1140h ;less significant 16 bits db 058bh ;most significant 16 bits 15... 8,7... 0 16 bit registers FS GS Accumulator Base Count Data Base Pointer Source Index Destination Index Code Segment Data Segment Stack Segment Extra Segment Instruction Pointer Stack Pointer Flags

6. 2.4 Processor Registers Flag register CF PF AF ZF SF TF IF DF OF IOPL NT Carry Flag Parity Flag Auxiliary carry Flag Zero Flag Sign Flag Trace Flag Interrupt enable Flag Direction Flag Overflow Flag I/O Priority Level Nested Task Contains Carry out of MSB of result Indicates if result has even parity Contains Carry out of bit 3 in AL Indicates if result equals zero Indicates if result is negative Provides a single step capability for debugging Enables/disables interrupts Controls pointer updating during string operations Indicates that an overflow occurred in result Priority level of current task (two bits) Indicates if current task is nested

7. 2.5 Data Organization Bits, Bytes, Words, Double-words Name Bit Nibble Byte Word Double Word Size BInary digiT 4 bits 8 bits 16 bits = 2 bytes 32 bits = 4 bytes Possible Values BinaryHexadecimalDecimal 0,10,10,1 0...1111 0...F0…15 0…1111,11110…FF0…255 0…(16 ‘1’s) 0…FFFF0…65,535 0…(32 ‘1’s)0…FFFFFFFF0...4,294,967,295 Byte swapping: if a word has to be stored into an 8 bit wide memory at address adr, its low byte is stored at adr and its high byte at adr+1. If a word is read from an 8 bit memory at address adr, the low byte is loaded from adr and the high byte from adr+1. Rule: low significance low address

8. 2.5 Data Organization Assembler directives DB, DW, DUP and EQU. Example 0000.DATA 0000 03 NUM1DB3 0001 04 NUM2DB100B 0002 00 NUM3DB? 0003 0D 30 C8 3A CE NUMSDB15O,48,200,3AH,0CEH 0008 48 69 24 MSGDB ’Hi$’ 000E 0006 WXDW6 0010 03E8 WYDW1000 0012 1234 ABCD WZDW1234H,0ABCDH 0016 0000 TEMPDW? 0018 000A [00] SRSDB10 DUP(0) 0022 0007 [0000] TIMEDW7 DUP(?) =000D TOPEQU13 =157C MOREEQU5500 Define Byte reserves memory for a byte and assign to it the specified value. Similarly, Define Word reserves memory space for a word and assign to it the specified value.... 0003 0D 0004 30 0005 C8 0006 3A 0007 CE... Byte swapping 0012 34 0013 12 0014 CD 0015 AB... A numerical value begins with a decimal digit, or a non-significant “0” is added A list of values can be used. A ’character string’ generates the associate ASCII bytes Decimal, binary, octal or hexadecimal numbers can be used. A “?” reserves memory space without assigning values. Duplicate repeats n times the value between ( ). Equate directive assign a value to a constant without memory space reservation. A label is assigned the address of the first byte involved in its statement.

9. 2.6 Instruction types Data transfer instructions 8086 instruction set INInput byte or word from port LAHFLoad AH from flags LDSLoad pointer using data segment LEALoad effective address LESLoad pointer using extra segment MOVMove to/from register/memory OUTOutput byte or word to port POPPop word off stack POPFPop flags off stack PUSHPush word onto stack PUSHFPush flags onto stack SAHFStore AH into flags XCHGExchange byte or word XLATTranslate byte Additional 80286 instructions INSInput string from port OUTSOutput string to port POPAPop all registers PUSHAPush all registers Additional 80386 instructions LFS Load pointer using FS LGS Load pointer using GS LSS Load pointer using SS MOVSX Move with sign extended MOVZX Move with zero extended POPAD Pop all double (32 bit) registers POPD Pop double register POPFD Pop double flag register PUSHAD Push all double registers PUSHD Push double register PUSHFD Push double flag register Additional 80486 instruction BSWAPByte swap Additional Pentium instruction MOVMove to/from control register

10. 2.6 Instruction types Arithmetic instructions 8086 instruction set AAAASCII adjust for addition AADASCII adjust for division AAM ASCII adjust for multiply AAS ASCII adjust for subtraction ADCAdd byte or word plus carry ADDAdd byte or word CBWConvert byte or word CMPCompare byte or word CWDConvert word to double-word DAADecimal adjust for addition DAS Decimal adjust for subtraction DECDecrement byte or word by one DIVDivide byte or word IDIVInteger divide byte or word IMULInteger multiply byte or word INCIncrement byte or word by one MULMultiply byte or word (unsigned) NEGNegate byte or word SBBSubtract byte or word and carry (borrow) SUBSubtract byte or word Additional 80386 instructions CDQConvert double-word to quad-word CWDE Convert word to double-word Additional 80486 instructions CMPXCHG Compare and exchange XADD Exchange and add Additional Pentium instruction CMPXCHG8B Compare and exchange 8 bytes

11. 2.6 Instruction types Bit manipulation instructions 8086 instruction set ANDLogical AND of byte or word NOTLogical NOT of byte or word ORLogical OR of byte or word RCLRotate left trough carry byte or word RCRRotate right trough carry byte or word ROL Rotate left byte or word ROR Rotate right byte or word SALArithmetic shift left byte or word SAR Arithmetic shift right byte or word SHL Logical shift left byte or word SHR Logical shift right byte or word TESTTest byte or word XORLogical exclusive-OR of byte or word Additional 80386 instructions BSFBit scan forward BSRBit scan reverse BTBit test BTCBit test and complement BTRBit test and reset BTSBit test and set SETccSet byte on condition SHLDShift left double precision SHRDShift right double precision

12. 2.6 Instruction types String instructions 8086 instruction set CMPSCompare byte or word string LODSLoad byte or word string MOVSMove byte or word string MOVSB(MOVSW)Move byte string (word string) REPRepeat REPE (REPZ)Repeat while equal (zero) REPNE (REPNZ)Repeat while not equal (not zero) SCASScan byte or word string STOSStore byte or word string