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Chapter 9 Trap Routines & RET Subroutines (or Functions) & JSR & JSRR & RET.

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Presentation on theme: "Chapter 9 Trap Routines & RET Subroutines (or Functions) & JSR & JSRR & RET."— Presentation transcript:

1 Chapter 9 Trap Routines & RET Subroutines (or Functions) & JSR & JSRR & RET

2 LC-3 has Memory Mapped I/O LC-3 Memory Layout: x0000 – x00FF Trap vectors (Supports Software Interrupts) x0020 [x0400] GETC (Read Char from Keyboard) x0021 [x0430] OUT (Write Character to Console) x0022 [x0450] PUTS (Write string to Console) x0023 [x04A0] IN (Prompt, input character from Keyboard, echo character to Console) x0024 [x04E0] PUTSP (Write “packed” string to Console) x0025 [xFD70] HALT (Turn off run latch in MCR) x0100 – x01FF Interrupt Vectors (Supports Hardware Interrupts) x0200 – x2FFF System Programs & Data (“Operating System”) x3000 – xFDFF User Programs Area (with Traps & Subroutine Calls) xFE00 – xFFFF I/O Programming “Registers” (Mapped I/O Registers) xFE00 KBSR [15 {Ready}, 14 {Intr enable}] (Keyboard Status Register) xFE02 KBDR [7:0{ascii data}] (Keyboard Data Register) xFE04 DSR [15{Done}, 14{Intr enable}] (Display Status Register) xFE06 DDR [7:0{ascii data}] (Display Data Register xFFFE MCR [15{Run latch}] (Machine Control Register)

3 Trap Instruction: TRAP x 1111 0000 trap vector F0xx [PC ]  R7 Jump to routine at trap vector address Return: RET 1100 000 111 000000 C1C0 [R7]  PC (JMP R7) Some Conventions (For the LC-3): Data passed (read & write) in R0, Error messages returned in R5 Trap Routines

4 Traps 1)Execute TRAP “vector” - Service Routine Addresses Trap Vectors are at memory locations [0000:00FF] Trap Vectors contain addresses of “Pre written (?)” Service Routines 2) [PC] is stored in R7 3) Address of Trap Service Routine loaded into PC 4) Service Routine Program executed 7)Trap service routine program ends with an RET ([R7] loaded into PC)

5 TRAP x21 OUT Trap Vector Routine (Output Character) ; out.asm ;.ORIG x0430 ; System call starting address ST R1, SaveR1 ; R1 will be used to poll the DSR ; hardware ; ; Write the character ; TryWrite LDI R1, DSR ; Get status BRzp TryWrite ; Bit 15 on says display is ready WriteIt STI R0, DDR ; Write character ; ; return from trap ; Return LD R1, SaveR1 ; Restore registers RET ; Return from trap (JMP R7, actually) ; DSR.FILL xFE04 ; Address of display status register DDR.FILL xFE06 ; Address of display data register SaveR1.BLKW 1.END

6 ; in.asm Service Routine for Keyboard Input ;.ORIG x04A0 START ST R1,SaveR1 ; Save the register values ST R2,SaveR2 ; that are used so that they ST R3,SaveR3 ; can be restored before RET ; LD R2,Newline L1 LDI R3,DSR ; Check DDR -- is it free? BRzp L1 STI R2,DDR ; Move cursor to new clean line ; LEA R1,Prompt ; Prompt is starting address ; of prompt string Loop LDR R0,R1,#0 ; Get next prompt character BRz Input ; Check for end of prompt string L2 LDI R3,DSR BRzp L2 STI R0,DDR ; Write next character of ; prompt string ADD R1,R1,#1 ; Increment Prompt pointer BRnzp Loop ; Input LDI R3,KBSR ; Has a character been typed? BRzp Input LDI R0,KBDR ; Load it into R0 L3 LDI R3,DSR BRzp L3 STI R0,DDR ; Echo input character ; to the monitor ; L4 LDI R3,DSR BRzp L4 STI R2,DDR ; Move cursor to new clean line LD R1,SaveR1 ; Service routine done, restore LD R2,SaveR2 ; original values in registers. LD R3,SaveR3 RET ; Return from trap (i.e., JMP R7) TRAP x23 IN Trap Service Routine (Input Character) ; SaveR1.BLKW 1 SaveR2.BLKW 1 SaveR3.BLKW 1 DSR.FILL xFE04 DDR.FILL xFE06 KBSR.FILL xFE00 KBDR.FILL xFE02 Newline.FILL x000A ; newline (ASCII) Prompt.STRINGZ "Input a character>".END

7 TRAP x25 HALT Service Routine ; halt.asm Halts the program ;.ORIG xFD70 ; Where this routine resides ST R7, SaveR7 ST R1, SaveR1 ; R1: a temp for MC register ST R0, SaveR0 ; R0 is used as working space ; print message that machine is halting LD R0, ASCIINewLine TRAP x21 LEA R0, Message TRAP x22 LD R0, ASCIINewLine TRAP x21 ; ; clear bit 15 at xFFFE to stop the machine ; LDI R1, MCR ; Load MC register into R1 LD R0, MASK ; R0 = x7FFF AND R0, R1, R0 ; Mask to clear the top bit STI R0, MCR ; Store R0 into MC register ; ; return from HALT routine. ; (how can this routine return if the machine is halted above?) ; LD R1, SaveR1 ; Restore registers LD R0, SaveR0 LD R7, SaveR7 RET ; JMP R7, actually ; ; Some constants ; ASCIINewLine.FILL x000A SaveR0.BLKW 1 SaveR1.BLKW 1 SaveR7.BLKW 1 Message.STRINGZ "Halting the machine." MCR.FILL xFFFE ; Address of MCR MASK.FILL x7FFF ; Mask to clear the top bit.END

8 TRAP 22 PUTS Trap Service Routine (Output a Character String) ; puts.asm Output a Character String ; This service routine writes a NULL-terminated string to the console. ; It services the PUTS service call (TRAP x22). ; Inputs: R0 is a pointer to the string to print. ; Context Information: R0, R1, and R3 are saved, and R7 is lost ; in the jump to this routine ;.ORIG x0450 ; Where this Service Routine resides ST R7, SaveR7 ; Save R7 for later return ST R0, SaveR0 ; Save other registers that are used by this routine ST R1, SaveR1 ST R3, SaveR3 ; ; Loop through each character in the array ; Loop LDR R1, R0, #0 ; Retrieve the character(s) BRz Return ; If it is 0, done L2 LDI R3,DSR BRzp L2 STI R1, DDR ; Write the character ADD R0, R0, #1 ; Increment pointer BRnzp Loop ; Do it all over again ; ; Return from the request for service call Return LD R3, SaveR3 ; Restore Registers LD R1, SaveR1 LD R0, SaveR0 LD R7, SaveR7 RET ; ; Register locations DSR.FILL xFE04 DDR.FILL xFE06 SaveR0.FILL x0000 SaveR1.FILL x0000 SaveR3.FILL x0000 SaveR7.FILL x0000.END

9 JSR Instruction: JSR offset (11 bit) 0100 1 xxxxxxxxxxx [PC ]  R7, JMP Offset Jump to Subroutine at offset from PC JSRR Instruction: JSRR Rx 0100 0 00 xxx 000000 [PC ]  R7, JMP [Reg] Jump to Subroutine at address in Rx Return: RET 1100 000 111 000000 C1C0 [R7]  PC (JMP [R7]) Return to Instruction after Jump to Subroutine (or TRAP) Subroutines

10 1) Execute JSR or JSRR - Call Subroutine or Method Location of Subroutine is specified in the Instruction 2) [PC] stored in R7 3) Address from JSR or JSRR is loaded into PC 4) Subroutine is executed R0 likely contains passed parameter (or address) R5 may be used to return error message R0 likely contains return parameter (or address) 5) Subroutine program ends with an RET ( [R7] loaded into PC) How does this mechanism support recursion?

11 Subroutines vs Traps How are Subroutines different from Traps ? –Traps are called using the TRAP instruction (Indirect call through the Trap Vector Table) Subroutines are called using JSR or JSRR instructions (JSR Direct call, JSRR Indirect call) – Both end with a RET ( load the return address) A Trap is a Subroutine call (Indirect) through a Vector Table rather than through a Register (the Trap Vector Table [x0000-x00FF]).

12 Trap Service Routine for Character Input (P 234).ORIG x04A0 START ST R7,SaveR7 ; Save Registers JSR SaveReg LD R2,Newline ; Write “newline” JSR WriteChar ; LEA R1,PROMPT ; Write prompt character string Loop LDR R2,R1,#0 ; Get next prompt char BRz Input ; Go to Input when done JSR WriteChar ; Write character ADD R1,R1,#1 BRnzp Loop ; Input JSR ReadChar ; Read Input character ADD R2,R0,#0 ; Echo to monitor JSR WriteChar ; LD R2,Newline ; Write “newline” JSR WriteChar JSR RestoreReg ; Restore Registers & Return LD R7,SaveR7 RET ; SaveR7.FILL x0000 Newline.FILL x000A Prompt.STRINGZ "Input a character> "

13 Trap Service Routine for Character Input (2) WriteChar LDI R3,DSR ; Monitor Done? BRzp WriteChar STI R2,DDR ; Send Char RET DSR.FILL xFE04 DDR.FILL xFE06 ; ReadChar LDI R3,KBSR ; Keyboard Ready? BRzp ReadChar LDI R0,KBDR ; Get Char RET KBSR.FILL xFE00 KBDR.FILL xFE02 ; SaveReg ST R1,SaveR1 ; Store R1,.., R6 ST R2,SaveR2 ST R3,SaveR3 ST R4,SaveR4 ST R5,SaveR5 ST R6,SaveR6 RET ; RestoreReg LD R1,SaveR1 ; Load R1,..., R6 LD R2,SaveR2 LD R3,SaveR3 LD R4,SaveR4 LD R5,SaveR5 LD R6,SaveR6 RET ; SaveR1.FILL x0000 SaveR2.FILL x0000 SaveR3.FILL x0000 SaveR4.FILL x0000 SaveR5.FILL x0000 SaveR6.FILL x0000 ;.END Why wasn’t R7 stored on each JSR ? Why wasn’t R1–R6 stored on each JSR ? Why is SaveR7 not with SaveR1 thru SaveR6 ?

14 The STACK The S tack is a dynamic “data structure” descending from high memory to lower memory (The stack grows down ) The Stack Pointer (R6) points to the top word on the stack. (The Stk Ptr is the “stack reference” that is available to the programmer) A new entry (word) is “ PUSHed ” onto the stack To take a word off of the Stack, the top word is “ POPed” off of the stack.

15 Stack R6 is the Stack Ptr Push: Push ADD R6, R6, #-1 ; Decrement Stack Ptr STR R0, R6, #0 ; “Push” Data onto Stack Pop: Pop LDR R0, R6, #0 ; “Pop” Data off of Stack ADD R6, R6, #1 ; Increment Stack Ptr Which way does the Stack grow? Where does Stack Ptr (R6) point?

16 Stack Underflow Check (Stack Empty) ; Stack POP subroutine. SP is R6. Returns “data” in R0. ; Fails if the stack is empty (SP=x4000) and reports error (1 --> R5) POP LDR1, STK_Empty; Compare Stk Ptr with “Empty” ADD R2, R6, R1 BRzfail_exit; EXIT IF STACK IS EMPTY ; if ok, Pop LDRR0, R6, #0; Pop top of Stack into R0 and ADDR6, R6, #1; Increment Stk Ptr ANDR5, R5, #0; R5 <-- 0 (POP successful) RET fail_exit AND R5, R5, #0; R5 <-- 1 (POP failed - underflow) ADDR5, R5, #1 RET STK_Empty.FILL xC000; STK_Empty  -x4000 (Stack begins at x3FFF)

17 Stack Overflow Check (Stack too Large) ; Stack PUSH subroutine. SP is R6. Value in R0 is pushed onto the stack. ; Fails if Stack is full (SP=x3F00) and reports error (1  R5) PUSH LD R1, STK_Full; Compare Stack Ptr with “Full” ADD R2, R6, R1 BRz fail_exit; EXIT IF STACK IS FULL ; if ok, PUSH ADD R6, R6, #-1; Decrement Stk Ptr and STR R0, R6, #0; “Push” R0 onto top of Stack AND R5, R5, #0; “Report” no Error 0  R5 RET fail_exit AND R5, R5, #0; “Report Error” 1  R5 ADD R5, R5, #1 RET STK_Full.FILL xC100; STK_Full <-- -x3F00 (Stack max is x3F00)

18 ; PUSH and POP Subroutines. STK Ptr is R6. Data in R0. Success: R0 = 0. ; Stack: x3FFF to x3F00 (256 words max). POP and PUSH are Entry Points. POP ST R2,Save2 ; R1 & R2 are used by “POP”. Save them. ST R1,Save1 LD R1,STK_Empty ; Compare Stk Ptr with “Empty” ADD R2,R6,R1 BRz fail_exit ; EXIT IF STACK IS EMPTY LDR R0,R6,#0 ; “POP” top of Stack into R0 and ADD R6,R6,#1 ; Increment stack pointer BRnzp success_exit PUSH ST R2,Save2 ; R1 & R2 are used by “PUSH”. Save them. ST R1,Save1 LD R1,STK_Full ; Compare Stk Ptr with “Full” ADD R2,R6,R1 BRz fail_exit ; EXIT IF STACK IS FULL ADD R6,R6,#-1 ; Decrement Stk Ptr and STR R0,R6,#0 ; “PUSH” R0 onto top of Stack success_exit AND R5,R5,#0 ; R5 <-- 0 (success) LD R1,Save1 ; Restore registers and Return LD R2,Save2 RET fail_exit AND R5,R5,#0 ; R5 <-- 1 (failure) ADD R5,R5,#1 LD R1,Save1 ; Restore registers and Return LD R2,Save2 RET STK_Empty.FILL xC000 ; BASE = –x4000. STK_Full.FILL xC100 ; Stack 256 words Save1.FILL x0000 Save2.FILL x0000.END Subroutine for Push & Pop What is a reasonable length for the Stack ?


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