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Fundamental Complexity of Optical Systems Hadas Kogan, Isaac Keslassy Technion (Israel)
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Router – schematic representation Problem - electronic routers do not scale to optical speeds: Access to electronic memory is slow and power consuming. Data conversions are power consuming as well. Electronic to optic Electronic to optic … LookupSwitching Optic to electronic … Buffering Router
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Power consumption per chassis [Nick McKeown, Stanford] There has to be some future alternative!
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How about an optical router? No electronic memory bottleneck No O/E/O conversions BUT: An optical router is thought to be too complex. Is it?
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Optical router complexity Objective: quantify the fundamental complexity of an optical router Two types of fundamental complexity: Construction complexity: number of basic optical components needed (e.g., 2x2 optical switches) Control complexity: frequency of optical switch reconfigurations
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Main contributions Define fundamental complexity in general optical constructions: Control complexity Construction complexity Find lower and upper bounds on these costs. Construct optical router with minimum complexity.
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Outline Background Control complexity (# switch reconfigurations) Definition Bounds Construction complexity (# switches) Definition Optimally constructed constructions
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Two possible ways to “store” light To slow/stop light. BUT: requires gas environments with tight temperature and pressure constraints, and currently seems impractical. Use optical switches and fiber delay lines.. Buffer
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An optical memory cell: (a) writing the packet (b) circulating the packet (c) reading the packet How do we store light? 111 (a)(b)(c) We’ve presented a buffer capable of storing one optical packet.
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A naive optical queue with buffer B The number of 2 2 switches needed for the naive construction is B. Could be less than B when several packets can share the same line (with different line lengths). 11111
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What we want: an ideal router An output-queued push-in-first-out (OQ- PIFO) switch. OQ - Arriving packets are placed immediately in the queue of size B at their destination output. PIFO – packets departure ordering is according to their priority. Input 1 Input N … … Output 1 Output N
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What we want: an ideal router Why it is ideal: OQ: Work conserving implies best throughput and minimal delay. PIFO: Enables FIFO, strict priorities, WFQ… But – up to N packets destined to the same output: Speed-up for switch Speed-up for queue PIFO is hard to implement.
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How do we do it in optics? If packets are destined to different outputs: Switching: optical switch NxN with O(NlnN) 2x2 optical switches ([Shannon ’49], [Benes ’67]). Buffering: optical PIFO queue B 2x2 optical switches ([Sarwate & Anantharam ’04]). Input 1 Input N … … Output 1 Output N PIFO OQ 1 B 1 B 1 1 2 2 3 3 Output 2 Output 3
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Control complexity
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Generalization to systems An optical system - a network element that has input links, output links and inner states, and is built with optical 2x2 switches and FDLs. Inner states - the different settings of the system elements. External states – distinguishable possible system outputs.
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Definition Control complexity – a measure of the minimal expected number of switch reconfigurations. Example: 4 inputs, 4 outputs, 3 external states: What is the control complexity of an optical system with these states? 1 2 3 4 1 2 3 4 2 1 4 3 3 4 1 2 0.5 0.25 12341234 12341234 21432143 34123412
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Link to coding Source symbols: A 1 – w.p. 0.5 A 2 – w.p. 0.25 A 3 – w.p. 0.25 A 2x2 switch A binary digit State entropy Source entropy ??? Minimizing expected code length Coding results should apply also to switching! Coding Switching 0.5 0.25 12341234 12341234 21432143 34123412
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Definitions A super switch: Passive and active controls – for each state, a control is called passive if its value is irrelevant for setting that state. Otherwise, it is called active. C
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Example: Active Passive Active With coding: w.p 0.5 A 1 ↔ 0 w.p 0.25 A 2 ↔ 10 w.p 0.25 A 3 ↔ 11 0.5 0.25 12341234 12341234 21432143 34123412 C 1 =0 C 1 =1, C 2 =0 C 1 =1, C 2 =1
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Definition – control complexity Definition: the control complexity of an optical system is its minimal expected number of active controls, T – states space, - number of active controls per state
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Link to coding Source symbols: A 1 – w.p. 0.5 A 2 – w.p. 0.25 A 3 – w.p. 0.25 A 2x2 switch A binary digit. States entropy Source entropy Minimized expected code length Coding Switching ??? Control complexity 0.5 0.25 12341234 12341234 21432143 34123412
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Lower bound Theorem: The control complexity is lower bounded by the entropy of the states: Proof: Similar to the proof of expected code length lower bound C2C2 C1C1 In the previous example: 0.5 0.25 12341234 12341234 21432143 34123412
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Theorem: The control complexity is upper bounded as follows: Stages of proof: Generate Huffman coding (expected code length ≤ H+1). There exists a construction (using multiplexers and distributers) of a memoryless system such that the active controls for each state are the Huffman coding of that state A system with memory can be composed from a memoryless system using a time-space transformation. An upper bound on the control complexity
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Construction complexity
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Definition Construction complexity: the minimal possible number of 2x2 switches in the construction. Examples: An NxN switch: N! states, O(NlnN) switches [Shannon, ‘49], [Benes, ‘65]. A Time Slot Interchange (TSI) with time frame N: N! states - O(lnN) switches [Jordan et. al., ‘94]. 12345678 N 12345678 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
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Construction complexity Intuition: With C 2x2 switches during T time slots, the possible number of resulting states K is upper bounded by 2 CT. Therefore: to get K states in state duration T, a lower bound on the construction complexity is given by:
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Optimally-constructed constructions A construction algorithm is optimally constructed if its number of 2x2 switches is equal in growth to the construction complexity. Examples: An NxN switch: A TSI: [Jordan et. al., ‘94]. [Benes, ‘65].
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Conclusion – construction complexity of optical routers Input 1 Input N … … Output 1 Output N NxN switch: Θ(Nln(N)) PIFO buffer of sizeB: Θ(ln(B)) B The construction complexity of an OQ-PIFO switch is Θ(Nln(N))+Θ(Nln(B)) = Θ(Nln(NB))
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Thank you!
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