1. Lab 10 RT methodology (cont’d) Example 1 – a counter Example 2 – a repetitive-adder multiplier

2. RT Methodology - Review Key characteristics: Use registers to store intermediate data. Use a data path to realize all the required operations. Use a control path to specify the order of the register operations.

3. Extended example 1: a counter

4. Example: a counter Specification: When start = 1 and reset = 0, the system starts counting at each rising edge. If inc = 0, counter is incremented by one; otherwise, it is incremented by two. A synchronous reset is implemented to reset the counter to zero. counter represents the current value of the counter. When counter reaches a value of six or greater, the output end is set to one for a clock period and the counter stops. Finally, the counter is set to zero and the system waits for start = 1 again. Counter Register to be used

5. A data-path for the counter

6. A control path for the counter

7. Top File

8. VHDL Code Register

9. VHDL Code Adder

10. VHDL Code Multiplexer

11. Data path

12. Control path

13. Top

14. Extended example a: a repetitive-adder multiplier

15. Repetitive Addition Multiplier Repetitive-Addition Multiplier is a sequential method to multiple. It uses just one adder unit and a subtracter unit to multiply. Sequential methodology is used when area is critical compared timing. Example: 7x5=7+7+7+7+7=35; i.e., add 7 five times.

16. Algorithm

17. ASM Input: –a_in, b_in: 8-bit unsigned –clk, reset –start: command Output: –r: 16-bit unsigned –ready: status

18. Data Path Construction of the data path 1- List all RT operations 2- Group RT operation according to the destination register 3- Add combinational circuit/mux 3- Add status circuits

19. Control Path Construction of the data path 1- Next state process 2- Output process - Moore 3- Output process - Mealy 3- Update state process