1. Ryan Kastner ASIC/SOC, September 2000 1 Coupling Aware Routing Ryan Kastner, Elaheh Bozorgzadeh and Majid Sarrafzadeh Department of Electrical and Computer Engineering Northwestern University Ryan Kastner, Elaheh Bozorgzadeh and Majid Sarrafzadeh Department of Electrical and Computer Engineering Northwestern University

2. Ryan Kastner ASIC/SOC, September 2000 2OutlineOutline Coupling Definition Effects Coupling-Free Routing Definition Uses Algorithms for Coupling-Free Routing Greedy Forcing Results Conclusion Coupling Definition Effects Coupling-Free Routing Definition Uses Algorithms for Coupling-Free Routing Greedy Forcing Results Conclusion

3. Ryan Kastner ASIC/SOC, September 2000 3CouplingCoupling Definition - capacitance between adjacent wires Deep submicron trends: Interconnect has more dominant role Scale wire height at slow rate compared to width Definition - capacitance between adjacent wires Deep submicron trends: Interconnect has more dominant role Scale wire height at slow rate compared to width Coupling can account for up to 70% of interconnect capacitance even in.25 micron designs

4. Ryan Kastner ASIC/SOC, September 2000 4 Effects of coupling Delay deterioration Total capacitance seen by a gate is no longer a constant value Causes uncertainty in delay calculation Crosstalk Noise caused by coupling Leads to circuit failure and increased delay Delay deterioration Total capacitance seen by a gate is no longer a constant value Causes uncertainty in delay calculation Crosstalk Noise caused by coupling Leads to circuit failure and increased delay C e = 0 C e = 2C c aggressor victim

5. Ryan Kastner ASIC/SOC, September 2000 5 Interconnect delay  resistivity of the conductor  = insulator dielectric constant w,t,h = conductor’s width, thickness and separation l, s = coupled length and spacing of interconnect During routing, we can control l and s

6. Ryan Kastner ASIC/SOC, September 2000 6 How can we avoid coupling? Interconnect spacing Increasing the spacing between wires can reduce coupling Much work on this subject (Wong @ U. Texas, Cong @ UCLA) Coupled interconnect length Coupling directly depends on the parallel length of adjacent wires Route wires to avoid long parallel overlaps Interconnect spacing Increasing the spacing between wires can reduce coupling Much work on this subject (Wong @ U. Texas, Cong @ UCLA) Coupled interconnect length Coupling directly depends on the parallel length of adjacent wires Route wires to avoid long parallel overlaps Highly coupled Highly coupled No coupling

7. Ryan Kastner ASIC/SOC, September 2000 7 Simplify definition of coupling Two wires couple if the segments forming them are closer than d units for more than l units distance < d length > l Two wires couple if distance l Otherwise, they do not couple Two wires couple if distance l Otherwise, they do not couple

8. Ryan Kastner ASIC/SOC, September 2000 8 Coupling-Free Routing (CFR) Given a set of nets S={N i ={(x 1i,y 1i ),(x 2i,y 2i )} | 1  i  n} S is coupling-free if there is a single bend layout for every net such that no two routes couple Given a set of nets S={N i ={(x 1i,y 1i ),(x 2i,y 2i )} | 1  i  n} S is coupling-free if there is a single bend layout for every net such that no two routes couple Coupled layout Coupling-free layout

9. Ryan Kastner ASIC/SOC, September 2000 9 Usefulness of CFR Minimum interconnect delay Single bend routing insures minimum wirelength Introduces only one via Coupling between nets is minimized Increases predictability of routes Allows accurate prediction of wirelength, congestion, etc Predictable Routing, ICCAD 2000 Speeds up single net routing process Minimum interconnect delay Single bend routing insures minimum wirelength Introduces only one via Coupling between nets is minimized Increases predictability of routes Allows accurate prediction of wirelength, congestion, etc Predictable Routing, ICCAD 2000 Speeds up single net routing process

10. Ryan Kastner ASIC/SOC, September 2000 10 Usefulness of CFR-Detailed Routing As fabrication technology progresses, routing layers become more plentiful Reserving layers for critical nets is common Power, ground and clock are already routed on preferred layers Use preferred layers for critical nets Layer can be used for timing critical nets Critical nets have little “slack” - need minimum delay CFR insures that nets have minimum delay minimum wirelength minimum number of vias minimum coupling As fabrication technology progresses, routing layers become more plentiful Reserving layers for critical nets is common Power, ground and clock are already routed on preferred layers Use preferred layers for critical nets Layer can be used for timing critical nets Critical nets have little “slack” - need minimum delay CFR insures that nets have minimum delay minimum wirelength minimum number of vias minimum coupling

11. Ryan Kastner ASIC/SOC, September 2000 11 Usefulness of CFR-Single Layer Single layer routing is a important problem for routing Area routers often use single layer routing for each layer Printed Circuit Board (PCB) use single layer algorithms Best known academic single layer router (developed by Lin and Ro) uses two step process Find a maximum planar set of one-bend nets Use rubberband equivalent to route remaining nets CFR can be easily be incorporated into in first step to produce a planar set of nets with minimum coupling Single layer routing is a important problem for routing Area routers often use single layer routing for each layer Printed Circuit Board (PCB) use single layer algorithms Best known academic single layer router (developed by Lin and Ro) uses two step process Find a maximum planar set of one-bend nets Use rubberband equivalent to route remaining nets CFR can be easily be incorporated into in first step to produce a planar set of nets with minimum coupling

12. Ryan Kastner ASIC/SOC, September 2000 12 Usefulness of CFR-Global routing Coupling at global routing is hard to determine Routes are not exact, makes it difficult to know adjacency relations of nets Detailed router will often make local changes Global routing allows global changes, it is next to impossible to make global changes at the detailed stage A coupling-free global layout will produce a coupling- free detailed layout Coupling at global routing is hard to determine Routes are not exact, makes it difficult to know adjacency relations of nets Detailed router will often make local changes Global routing allows global changes, it is next to impossible to make global changes at the detailed stage A coupling-free global layout will produce a coupling- free detailed layout

13. Ryan Kastner ASIC/SOC, September 2000 13 MAX-CFL Definition Given a set of two-terminal nets S and a positive integer K  |S|. Is there a single bend routing for at least K nets such that no two routings couple? Additional routing constraints can easily be added Routed nets must be planar Routed nets must be routed on two layers MAX-CFL for planar layouts is NP-Complete General MAX-CFL NP-Complete? Given a set of two-terminal nets S and a positive integer K  |S|. Is there a single bend routing for at least K nets such that no two routings couple? Additional routing constraints can easily be added Routed nets must be planar Routed nets must be routed on two layers MAX-CFL for planar layouts is NP-Complete General MAX-CFL NP-Complete?

14. Ryan Kastner ASIC/SOC, September 2000 14AlgorithmsAlgorithms We developed two algorithms Greedy Forcing Algorithms try to maximize number of nets routed and/or criticality of routed nets We developed two algorithms Greedy Forcing Algorithms try to maximize number of nets routed and/or criticality of routed nets

15. Ryan Kastner ASIC/SOC, September 2000 15CriticalityCriticality Most often defined as the amount of timing slack available for the net Slack values given gates, nets during logic synthesis stage Delay through a network of gates and wires must not exceed clock frequency Most often defined as the amount of timing slack available for the net Slack values given gates, nets during logic synthesis stage Delay through a network of gates and wires must not exceed clock frequency Flip Flop gate Flip Flop network DSM increases for need interconnect timing slack

16. Ryan Kastner ASIC/SOC, September 2000 16 Results in terms of criticality Benchmarks do not have criticality data We used wire length for criticality Delay increases at rate: O(l 2 ) without wiresizing O(l  l) with optimal wiresizing O(l) with proper buffer insertion We ran experiments using each function as criticality Benchmarks do not have criticality data We used wire length for criticality Delay increases at rate: O(l 2 ) without wiresizing O(l  l) with optimal wiresizing O(l) with proper buffer insertion We ran experiments using each function as criticality Criticality functions: Quadratic (l 2 ), l-root-l (l  l) and linear (l) functions

17. Ryan Kastner ASIC/SOC, September 2000 17 Greedy Algorithm 1 Given a set of nets N 2 Sort N by criticality (largest  smallest) 3 for each net n  N 4 do route n in upper-L or lower-L, if possible Simple and fast; Running time is O(n log n) 1 Given a set of nets N 2 Sort N by criticality (largest  smallest) 3 for each net n  N 4 do route n in upper-L or lower-L, if possible Simple and fast; Running time is O(n log n)

18. Ryan Kastner ASIC/SOC, September 2000 18 Forcing algorithm In order to avoid coupling, a routing of a net forces another net into a particular route Net 1 Net 2 To avoid coupling Net 2 must be lower-L To avoid coupling Net 2 must be lower-L Net 1 Net 2 An lower-L routing of Net 1 forces a lower-L routing of Net 2

19. Ryan Kastner ASIC/SOC, September 2000 19 Forcing Algorithm 1 Given a set of net N 2 Determine the forcing interactions between the nets  N 3 R  NULL 4 for each net n  N 5 do R  R U n.upper-L U n.lower-L 6 Sort R by number of forcings (smallest  largest) 7 for each routing r  R 8 do if net associated with r is unrouted and r is routable 9then route r 1 Given a set of net N 2 Determine the forcing interactions between the nets  N 3 R  NULL 4 for each net n  N 5 do R  R U n.upper-L U n.lower-L 6 Sort R by number of forcings (smallest  largest) 7 for each routing r  R 8 do if net associated with r is unrouted and r is routable 9then route r Running time is O(n 2 )

20. Ryan Kastner ASIC/SOC, September 2000 20EvaluationEvaluation Find the x “most critical” nets in each circuit Vary x from 25 to 250 Perform algorithms on the x nets Gathered statistics from each layout Percentage of nets laid out Criticality of nets laid out Find the x “most critical” nets in each circuit Vary x from 25 to 250 Perform algorithms on the x nets Gathered statistics from each layout Percentage of nets laid out Criticality of nets laid out

21. Ryan Kastner ASIC/SOC, September 2000 21 Circuit Benchmarks

22. Ryan Kastner ASIC/SOC, September 2000 22 Fraction of nets placed Forcing algorithm outperforms greedy algorithm

23. Ryan Kastner ASIC/SOC, September 2000 23 Forcing vs. Greedy relative criticality = (greedy criticality)/(forcing criticality)

24. Ryan Kastner ASIC/SOC, September 2000 24 Criticality results Greedy algorithm outperforms every other function Using linear function: 20% better than forcing algorithm l-root-l and quadratic functions have similar trends Greedy algorithm outperforms every other function Using linear function: 20% better than forcing algorithm l-root-l and quadratic functions have similar trends Greedy algorithm best for criticality

25. Ryan Kastner ASIC/SOC, September 2000 25ConclusionConclusion Coupling-free routing useful for many routing algorithms Detailed routing Global routing Single layer routing Allows early prediction of routing metrics Congestion Wire length Interconnect delay Implication algorithm maximizes routes placed Greedy algorithm maximizes criticality placed Coupling-free routing useful for many routing algorithms Detailed routing Global routing Single layer routing Allows early prediction of routing metrics Congestion Wire length Interconnect delay Implication algorithm maximizes routes placed Greedy algorithm maximizes criticality placed