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ETAPS 2008 Budapest, Hungary April 6, 2008 Policies of System Level Pipeline Modeling Ed Harcourt Dept. Mathematics, Computer Science, and Statistics St.Lawrence University Workshop on Generative Technologies ETAPS 2008,The European Conference on Theory and Practice of Software Budapest, Hungary April 2008
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ETAPS 2008 Budapest, Hungary April 6, 2008
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Overview Hardware Description Languages SystemC, Briefly Review Hardware Pipelining Pipeline Policies Reusable pipeline policy classes Conclusions future work
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ETAPS 2008 Budapest, Hungary April 6, 2008 Language Based Design Hardware Description Languages (HDLs) Verilog, VHDL Discrete event simulation semantics Circuit complexity growing exponentially Poor abstraction mechanisms System Design Languages –SystemC, SystemVerilog Human Spec Architectural RTL Modeling gap [Sharad Malik] SystemC enables … Generic programming Generative programming Embedded DSLs
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ETAPS 2008 Budapest, Hungary April 6, 2008 SystemC C++ Library –Block Structure, Ports –HW data types –Discrete Event Simulator –Communication/Concurrency class Stage : public sc_module { public: sc_in in; sc_out out; Stage() { SC_METHOD(process); } void process() { int v = in.read(); int tmp = f(v); out.write(tmp); } }; Stage2 Stage1 in out in out
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ETAPS 2008 Budapest, Hungary April 6, 2008 Hardware Pipelining 2x 2 + 4x - 7 Stage s1; Stage s2; Stage s3; Pipeline p = s1 >> s2 >> s3; Human Spec Architectural RTL
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ETAPS 2008 Budapest, Hungary April 6, 2008 Complex Pipelines s1s2s3 Pipeline p1 = s1 >> s2 >> s3 >> s3; Pipeline p2 = s1 >> s2 >> s3*2; Pipeline p3 = s1 >> s2 >> s3 >> s1 >> s3*2 >> s1 >> s2; p3t1t1 t2t2 t3t3 t4t4 t5t5 t6t6 t7t7 t8t8 s1XXX s2XX s3XXX c1 c2 c3c4
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ETAPS 2008 Budapest, Hungary April 6, 2008 Policies for Modeling Pipelines Properties of Pipelines –Transaction –Route –Concurrency model –Communication model Properties of Stages –Function –Delay model s1s2s3
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ETAPS 2008 Budapest, Hungary April 6, 2008 class Stage1 : public sc_module { public: sc_fifo_in in; sc_fifo_out out; Stage() { SC_THREAD(process); } void process() { while (1) { Transaction * t = in.read(); t->data = t->data + 2 * sqr(t->orig); ::wait(1, SC_NS); t->advance(); out.write(t); } } }; Policies for Stages s1s2s3 Communication Concurrency Function Delay Model
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ETAPS 2008 Budapest, Hungary April 6, 2008 Generic Stage template <class Transaction, class Function, class DelayModel, class PortInterface, class ConcurrencyModel> class Stage : public sc_module, public Function, public DelayModel, public PortInterface, public RunInterface { Stage() { SC_THREAD(process); } void run() { Transaction * t = in.read(); t->data = f(t->data); delay(1); t->advance(); out.write(t); } void process() { ConcurrencyModel::run(this); } };
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ETAPS 2008 Budapest, Hungary April 6, 2008 Example Policy Classes template struct Transaction { T data; void advance() { curr++; } private: static Route *r; Route::iterator curr; }; template struct S1Func { static inline T f(T p) { … } }; struct TimedPolicy { static void delay(int x) { wait(x, SC_NS); } }; struct UntimedPolicy { static void delay(int) { } }; template < class Transaction, template class InPort, template class OutPort > struct PortInterface { InPort in; OutPort out; }; struct Threading { static void run( RunInterface *r) { while(1) r->run(); } }; struct Method { static void run( RunInterface *r) { r->run(); } };
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ETAPS 2008 Budapest, Hungary April 6, 2008 Controllers Transaction routers Transactions keep track of location Controllers have –arbitrary number input/output ports –routing table Route transactions to next stage s1s2s3 c1 c2 c3c4
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ETAPS 2008 Budapest, Hungary April 6, 2008 Elaboration Pipeline p3 = s1 >> s2 >> s3 >> s1 >> s3*2 >> s1 >> s2; s1s2s3 c1 c2 c3c4 Elaboration Depth-first the AST for the pipeline expression If encounter a new stage Instantiate stage Instantiate controllers if necessary Instantiate channels (FIFOs or wires), update map If stage is already instantiated Instantiate channel, update map
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ETAPS 2008 Budapest, Hungary April 6, 2008 Putting it all together typedef pair Data; typedef Transaction MyTransaction; typedef PortInterface< MyTransaction, sc_fifo_in, sc_fifo_out> FIFOInterface; Stage, TimedPolicy, FIFOInterface, Threading> s1; Stage, TimedPolicy, FIFOInterface, Threading> s2; Stage, TimedPolicy, FIFOInterface, Threading> s3; Pipeline p = s1 >> s2 >> s3*3 >> s1 >> s3;
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ETAPS 2008 Budapest, Hungary April 6, 2008 Conclusions and Future Work Generic/Generative programming + –Modeling gap C++ expertise Prototype more complex pipelines Use lambda library for function Beef up the pipeline expression language –Handle dynamic pipelines –Multi-function pipelines Lots of clean up –redundant template parameters –More compile time genericity
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