1. Device Driver for Generic ASC Module - Project Presentation - By: Yigal Korman Erez Fuchs Instructor: Evgeny Fiksman Sponsored by: High Speed Digital Systems Lab Parallel Systems Lab המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל Technion - Israel institute of technology department of Electrical Engineering

2. Our Vision Workflow 1. Write a conventional software implementation 2. Locate critical code sections 3. Convert these sections into hardware implementation using ASC API & syntax 4. Create a hardware core logic that implements the critical sections using the ASC compiler 5. Use our generic device driver to implement the communication between the software application and the hardware core logic 6. Load the hardware core into the FPGA and execute the application alongside combining hardware & software design

3. ASC – A Stream Compiler Read FIFO Write FIFO Configuration Registers ASC Backend Clock Reset Pipe Flushing Flush Data In Data Out Registers Access ASC Stream ProcessingPipe Internal Design Combinational (SW/HW) code Combinational (SW/HW) code –Write the software code in C/C++ –Add hardware sections in between using C++ code –Hardware is described by special C++ libraries Hardware is complied into standard NetList output (.edif) Hardware is complied into standard NetList output (.edif) –Supported by standard CAD tools –Supported by Xilinx FPGA architectures Provides HW optimization Provides HW optimization Wraps the hardware design with a generic backend for easy connection and communication Wraps the hardware design with a generic backend for easy connection and communication ASC Processing Pipe Workflow ASC Processing Pipe Workflow –Data is inserted into the Write FIFO and pushed through the Processing Pipe –The result of the calculations is pushed from the pipe to the Read FIFO in a cyclic order –Garbage data is inserted to the pipe during flush operation

4. Application Data Flow PLB Bus PPC 405 CPU PLB IPIF Interrupt Controller ASC Logic ASC Backend R/W FIFOs DMA Interrupt Support Memory Data to ASC Data to Memory Set DMA DMA Done

5. Linux Device Driver System Stack Custom & Third Party Applications Middleware & Application Services MontaVista Graphics Advanced Embedded FeaturesNetworking & Application Packages MontaVista Linux Kernel Device Drivers Reference Hardware Real-time Functionality Robust Security High Performance Networking High Reliability ASC Stream Driver ASC Module Test Application

6. Device Driver Features Kernel Module Kernel Module Multiple ASC modules support Multiple ASC modules support Memory Mapped I/O Memory Mapped I/O Fast asynchronous data transfers (Interrupts & DMA) Fast asynchronous data transfers (Interrupts & DMA) ASC pipe flush support ASC pipe flush support ASC Registers access ASC Registers access Status information Status information