1. ©Brooks/Cole, 2003 Chapter 5 Computer Organization

2. ©Brooks/Cole, 2003 Figure 5-1 Computer hardware (subsystems)

3. ©Brooks/Cole, 2003 CENTRALPROCESSING UNIT (CPU) CENTRALPROCESSING 5.1

4. ©Brooks/Cole, 2003 Figure 5-2 Central Processing Unit 1.Arithmetic Logical Unit (ALU) 2.Registers 3.Control Unit

5. ©Brooks/Cole, 2003 Arithmetic Logical Unit (ALU) ALU performs arithmetic and logical operation Arithmetic Operation (increment, decrement, add, subtract….) Logical Operation (NOT, AND, OR, XOR..) Control Unit is responsible for selecting one of the logical and arithmetic operation

6. ©Brooks/Cole, 2003 Registers Registers are fast storage locations that hold data temporarily There are three types of registers; –Data Registers: used to hold input data to be processed in ALU and the results. –Instruction Registers (I Register): used to hold program instruction from the memory. –Program Counter (PC Register): used to keep track of the instruction currently being executed, after execution of the counter incremented to point to the next instruction

7. ©Brooks/Cole, 2003 MAIN MEMORY 5.2

8. ©Brooks/Cole, 2003 Main Memory Main memory is a collection of storage locations, each with a unique address. Data are transferred to and from memory in groups of bits called words. A word can be 8 bits (byte), 16 bits (2-byte), 32 bits (4-byte) and 64 bits (8 byte).

9. ©Brooks/Cole, 2003 Table 5.1 Memory units Unit Unit ------------ kilobyte megabyte gigabyte terabyte petabyte exabyte Approximation Approximation ------------ 10 3 bytes 10 6 bytes 10 9 bytes 10 12 bytes 10 15 bytes 10 18 bytes Exact Number of bytes Exact Number of bytes ------------------------ 2 10 (1024) bytes 2 20 (1,048,576) bytes 2 30 (1,073,741,824)bytes 2 40 bytes 2 50 bytes 2 60 bytes

10. ©Brooks/Cole, 2003 Address Space Each word in a memory has a unique identifier (address) For example, a memory with 64 kilobyte and a word of 1 byte has address space that range from 0 to 65353.

11. ©Brooks/Cole, 2003 Figure 5-3 Main memory

12. ©Brooks/Cole, 2003 Address as bit pattern Address is stored as bit patterns Each word in the memory has a unique address An address is a unsigned number stored as an unsigned integer The number of addresses’ bit patterns is equal to the number of words in the memory If computer has N number of words of memory, the number of bits in an address bit pattern is giving by Log 2 N = 3.2 Log 10 N

13. ©Brooks/Cole, 2003 Example 1 A computer has 32 MB (megabytes) of memory. How many bits are needed to address any single byte in memory? Solution

14. ©Brooks/Cole, 2003 Example 2 A computer has 128 MB of memory. Each word in this computer is 8 bytes. How many bits are needed to address any single word in memory? Solution

15. ©Brooks/Cole, 2003 Memory Types Memory are two types: –Random Access Memory (RAM) –Read Only Memory (ROM)

16. ©Brooks/Cole, 2003 Random Access Memory (RAM) Makes most of the main memory A user can read and write from and to the RAM. It is erasable (user can erase written data) It is volatile (information is deleted if power is down)

17. ©Brooks/Cole, 2003 RAM Technology RAM Technology is divided into: 1.Static RAM (SRAM): uses flip-flop (a logic electronic device) to hold bit state as long as power is on. It doesn't need refreshing. It is fast and expensive. 2.Dynamic RAM (DRAM): uses capacitor (an eclectic device) to hold bit state. When capacitor is charged, state is 1 and when capacitor is uncharged, state is 0. it needs refreshing. It is slow and inexpensive.

18. ©Brooks/Cole, 2003 Read Only Memory The data in the ROM is written by the computer manufacturer User is only allowed to read from the ROM, not to write. Nonvolatile (data are not erased when power is off) Used to hold booting program that runs when you switch on the computer.

19. ©Brooks/Cole, 2003 ROM Technology Programmable ROM (PROM): user can store programs in PROM. Once stored, programs can not be erased. Erasable Programmable ROM (EPROM): user can program it. It is only erased by special device. Electronically EPROM (EEPROM): user can erase programs using electronic impulse.

20. ©Brooks/Cole, 2003 Memory Hierarchy Computer users need a lot of memory. Cheap memory is not very fast Fast memory is not cheap. A compromise needed to be made. The solution is hierarchical levels of memory.

21. ©Brooks/Cole, 2003 Figure 5-4 Memory hierarchy Use small amount of high speed memory, when speed is important, use registers inside the CPU. Use moderate amount of medium speed memory to store data that accessed often. Use large amount of low speed memory data that are not often accessed.

22. ©Brooks/Cole, 2003 Figure 5-5 Cache Cache memory is faster than main memory but slower than the CPU and registers inside the CPU. Cache is placed between the CPU and main memory

23. ©Brooks/Cole, 2003 How CPU access a word? 1.CPU check the cache. 2.If the word is there it copies it, if not, CPU access the main memory and copies a block of memory starting with the desired word. This block replaces the data in the cache memory. 3.CPU accesses the cache and copies the word.

24. ©Brooks/Cole, 2003 80-20 rule Q: How cache is efficient despite small size? A: Most computer spend 80% of time accessing 20% of the data in the memory. These data are accessed over and over again. Cache memory which is fast speed can hold this 20% of data to make fast access to data at least 80% of time.

25. ©Brooks/Cole, 2003 INPUT / OUTPUT 5.3

26. ©Brooks/Cole, 2003 Input / Output Devices (I/O) subsystems can be: 1.Nonstorage Devices: allow CPU communicate with outside world but don’t store information, examples; keyboard, monitor and printer. 2.Storage Devices: store large amount of data to be retrieved later. They are cheaper than the main memory and they are nonvolatile, examples; magnetic or optical storage devices

27. ©Brooks/Cole, 2003 Magnetic Storage Devices Magnetic Storage Devices use magntization to store bit. If a spot is magnetized, it represents 1 if not it represents 0.

28. ©Brooks/Cole, 2003 Magnetic Disk Is one or more disks on top of each other. The disk is coated with a thin magnetic film. Information is stored on and retrieved form the surface of the disk using a read/write head for each magnetized surface.

29. ©Brooks/Cole, 2003 Figure 5-6 Physical layout of a magnetic disk

30. ©Brooks/Cole, 2003 Figure 5-7 Surface organization of a disk Each surface is divided into tracks, and each track is divided into sectors. Tracks are separated by intertrack gaps and sectors are separated by intersector gaps.

31. ©Brooks/Cole, 2003 Figure 5-7 Data Access The smallest unit to be accessed at one time is a sector. Block of data can be stored in one sector and retrieved independently.

32. ©Brooks/Cole, 2003 Figure 5-7 Performance Performance of magnetic disk of magnetic disk depends on: 1.Rotation Speed; how fast the disk can spin? 2.Seek time; time to move the read/write head to desired track. 3.Transfer time; the time to move data from the disk to the CPU/memory.

33. ©Brooks/Cole, 2003 Figure 5-8 Magnetic tape Half inch plastic tape coated with a thick magnetic film. The tape is mounted on two reels. The tape uses read/write head to read or write information when the tape is passed through it.

34. ©Brooks/Cole, 2003 Figure 5-9 Surface organization of a tape The width of the tape is divided into 9 tracks, each spot of a track can store 1 bit. Nine vertical spots can store 8 bits (1 Byte) of information and one bit for error detection. The length of the tape is divided into blocks each of 20 tracks

35. ©Brooks/Cole, 2003 Figure 5-9 Data Access of a magnetic tape Magnetic tape is a sequential access device. No addressing mechanism to access each block. To retrieve a specific block you need to pass through all the previous bolcks.

36. ©Brooks/Cole, 2003 Magnetic Tape Performance Magnetic tapes are slower than magnetic disk It is cheaper. Magnetic tape is used to backup large amounts of data.

37. ©Brooks/Cole, 2003 Optical Storage Devices Optical storage devices are new technology uses laser to store an retrieve data in computer. Devices that use this technology include CD- ROM, CD-R, CD-RW and DVD

38. ©Brooks/Cole, 2003 CD-ROM Compact Disc Read-Only Memory (CD-ROM) uses the same technology as the CD (compact disc) which was developed by Philips and Sony for recording music. The only difference between the two technologies is that CD-ROM is more robust and checks for errors.

39. ©Brooks/Cole, 2003 Figure 5-10 Creation and use of CD-ROM A.Master Disc: is created using high power infrared laser. The laser engraves pits (holes) and lands (no holes in the coated surface. The hole represents 0 and the land represents 1. B.From the master disc the mold is made. In the mold the pits (holes) is replaced by bumps. C.Polycarbonate resin is injected into the mold to produce the same pits in the master disc. A very thin reflective layer of aluminum is added. On top of it, a protective layer and a label is added.

40. ©Brooks/Cole, 2003 Figure 5-10 Reading the CD-ROM A.Low-powered laser emits from the laser source. B.The laser beam is reflected by the aluminum surface: A.When the laser passes through a land it is reflected B.When the laser passes through a pit it is reflected twice once by the pit boundary and the other by the aluminum layer. The two reflections have a destructive effect. Therefore, the sensor detects more light when the spot is land and less light when spot is pit

41. ©Brooks/Cole, 2003 Figure 5-11 CD-ROM format A.A byte is transformed into 14-bit symbol. B.A frame is made of 42 symbols. C.A sector is made of 98 frames.

42. ©Brooks/Cole, 2003 Table 5.2 CD-ROM speeds (reading speed) Speed ------------ 1x 2x 4x 6x 8x 12x 16x 24x 32x 40x Data Rate Data Rate ------------------------ 153,600 bytes per second 307,200 bytes per second 614,400 bytes per second 921,600 bytes per second 1,228,800 bytes per second 1,843,200 bytes per second 2,457,600 bytes per second 3,688,400 bytes per second 4,915,200 bytes per second 6,144,000 bytes per second Approximation Approximation ------------ 150 KB/s 300 KB/s 600 KB/s 900 KB/s 1.2 MB/s 1.8 MB/s 2.4 MB/s 3.6 MB/s 4.8 MB/s 6 MB/s

43. ©Brooks/Cole, 2003 CD-ROM Application CD-ROM technology is economical if the discs are massed produced.

44. ©Brooks/Cole, 2003 Compact Disc Recordable (CD-R) CD-R is inexpensive technology that allows users to create storage devices. It is useful for making backups. The user can write once but read many times. This sometimes called Write Once, Read Many (WORM)

45. ©Brooks/Cole, 2003 Figure 5-12 CD-R Creation The reflective layer is made of gold. An extra layer of dye is added Pit and land are simulated, to simulate a pit, high power laser beam makes a dark spot in the dye (changing the chemical composition), the area not hit by the beam is land.

46. ©Brooks/Cole, 2003 Figure 5-12 CD-R Reading CD-R can be read by CD-ROM and CD-R drive. The same low-power laser passes through the polycarbonate layer; –For the land, the beam reaches the reflective layer. –The pit, however, is opaque, so beam cannot reflect.

47. ©Brooks/Cole, 2003 Format and Speed The format, speed and capacity are the same as CD-ROM Application This technology allows people to create and distribute a small amount of disks. It is used to make archive files and backups.

48. ©Brooks/Cole, 2003 Compact Disc Rewritable (CD-RW) CD-RW technology allows user to overwrite previously stored material. CD-RW is called an erasable optical disc.

49. ©Brooks/Cole, 2003 Figure 5-13 CD-RW Creation Instead of dye, CD-RW uses an alloy of silver, and other materials. This alloy has two states; crystalline (transparent) and amorphous (nontransparent). high power laser is used to simulate pits and lands.

50. ©Brooks/Cole, 2003 CD-RW Reading CD-RW is read using CD-ROM drive. CD-RW Erasing Medium power laser is used to change spot from amorphous state to the crystalline state. CD-RW Application CD-R is more popular because blank CD-R disc is cheaper than blank CD-RW disc.

51. ©Brooks/Cole, 2003 Digital Versatile Disc (DVD) Used to store large amount of data (video) DVD technology is similar to CD-ROM with the following differences: –Pits are smaller (0.4 micron instead of 0.8 in CD- ROM) –Tracks are closer to each other. –The beam is red laser instead of infrared. –DVD uses one or two recording layers and can be single-sided or double-sided.

52. ©Brooks/Cole, 2003 Table 5.3 DVD capacities Feature Feature --------------------------------- single-sided, single-layer single-sided, dual-layer double-sided, single-layer double-sided, dual-layer Capacity Capacity ------------ 4.7 GB 8.5 GB 9.4 GB 17 GB

53. ©Brooks/Cole, 2003 DVD Compression DVD technology uses MPEG for compression. That enables a single-layer DVD to hold 133 minutes of video at high resolution. DVD Application DVD used to store a high volume of data

54. ©Brooks/Cole, 2003 SUBSYSTEMINTERCONNECTIONSUBSYSTEMINTERCONNECTION 5.4

55. Figure 5-14 Connecting CPU and memory using three buses

56. ©Brooks/Cole, 2003 Busses Data Bus: used to transport words. It is made of several wires. The number of wires depends on the size of the word. If the word is 32 bits, data bus should be 32 wires. Address Bus: used to transport address of particular word in the memory. The number of wires depends on the size of the memory. If the memory has 2 n words, the number of address wires is n. Control Bus: used to transport control command between the CPU and the memory. The number of wires in control bus depends on the total number of control commands in the computer, if computer has 2 m commands, the number of control wires should be m.

57. ©Brooks/Cole, 2003 Connecting I/O Devices I/O cannot be connected directly to the buses that connect the CPU because the nature of I/O devices are different from Memory/CPU. I/O devices operate at much lower speed than the CPU. Therefore there is need for an intermediary to handle these differences. This intermediary is called I/O controller or Interface

58. ©Brooks/Cole, 2003 Figure 5-15 Connecting I/O devices to the buses

59. ©Brooks/Cole, 2003 Controllers Controller or Interfaces remove the differences between the nature of I/O devices and CPU/Memory. A controller can be either serial or parallel device. A serial controller has only one wire connection to the device. A parallel controller has several connections to the device so that several bits can be transferred at a time. Most common controllers are SCSI, FireWire, USB

60. ©Brooks/Cole, 2003 Figure 5-16 Small Computer System Interface SCSI It is a parallel interface with 8, 16 or 32 wires. It provides daisy chained connection. Both ends of the chain must be terminated and each device must have a unique address.

61. ©Brooks/Cole, 2003 Figure 5-17 FireWire controller High speed serial interface that could transfer data at 50 MB/s. It can be used to connect up to 63 devices in a daisy chain or tree connection using a single wire. No need for termination as in SCSI

62. ©Brooks/Cole, 2003 Figure 5-18 Universal Series Bus (USB) It is a serial controller used to connect slower devices such as mouse or keyboard. It can transferer up to 1.5MB/s It has four wires; two to carry power to the device.

63. ©Brooks/Cole, 2003 Addressing I/O Devices CPU uses the same bus to read/write from/to the main memory and I/O devices. If instruction refers to the main memory, data transfer is between main memory and CPU. If instruction refers to the I/O devices, data transfer is between I/O devices and CPU. There are two methods to handle addressing; (1) Isolated I/O and Memory-Mapped I/O.

64. ©Brooks/Cole, 2003 Figure 5-19 Isolated I/O addressing Each I/O device has its own address. The I/O device address can overlap with the memory address without any conflict because the instructions that deal with I/O devices are different from the instructions deal with memory.

65. ©Brooks/Cole, 2003 Figure 5-20 Memory-mapped I/O addressing Each I/O device has its own address. The CPU treats each address as an address of a word in the main memory. CPU uses the same instructions to deal with I/O devices and the memory. Advantage is using smaller number of instructions. Disadvantage is consuming part of memory addresses

66. ©Brooks/Cole, 2003 PROGRAMEXECUTIONPROGRAMEXECUTION 5.5

67. Steps of machine cycle to execute Programs A program is a set of instructions stored in the memory. Machine Cycle: the CPU repeats machine cycle to execute instructions in program. In Fetch step, the control unit orders the system to copy the instruction in the I register. In Decode step, the instructions in the I register is decoded. In Execute step, CPU orders the ALU to execute instruction

68. ©Brooks/Cole, 2003 Machine Cycle Example adding two numbers Program stored in memory Input data Memory Address of the first instruction

69. ©Brooks/Cole, 2003 Figure 5-23.a Contents of memory and registers after each cycle After the first instruction: CPU copies (fetch) instruction stored at address 070 in the instruction register, decodes it and executes it by storing +14 in R1. PC register is incremented by 1, 070+1=071.

70. ©Brooks/Cole, 2003 Figure 5-23.b Contents of memory and registers after each cycle After the second instruction: CPU copies (fetch) instruction stored at address 071 in the instruction register, decodes it and executes it by storing -10 in R2. PC register is incremented by 1, 071+1=072.

71. ©Brooks/Cole, 2003 Figure 5-23.c Contents of memory and registers after each cycle After the third instruction: CPU copies (fetch) instruction stored at address 072 in the instruction register, decodes it and executes it by adding (+14) and (-10) and storing the answer (+4) in R3. PC register is incremented by 1, 072+1=073.

72. ©Brooks/Cole, 2003 Figure 5-23.d Contents of memory and registers after each cycle After the fourth instruction: CPU copies (fetch) instruction stored at address 073 in the instruction register, decodes it and executes it by storing the content of R3 in memory location addressed 202. PC register is incremented by 1, 072+1=074.

73. ©Brooks/Cole, 2003 Input/Output Operation There is need to transfer data from I/O devices to the CPU and memory. Since I/O devices operate at speed slower than CPU, CPU operation must be synchronized with the I/O devices. Synchronization is the process of adjusting the speed of 2 different systems operating at different speeds. There are three methods of synchronizations; Programmed I/O, interrupt driven I/O and DMA.

74. ©Brooks/Cole, 2003 Figure 5-24 Programmed I/O Data is transferred by instruction from the CPU CPU waits for I/O device CPU does nothing until the transfer is complete. If I/O device is not ready, CPU keeps checking the status of the I/O device. CPU time is wasted by this checks. Data transferred to memory.

75. ©Brooks/Cole, 2003 Figure 5-25 Interrupt-driven I/O Data is transferred by instruction from the CPU CPU informs I/O devices that a transfer is going to happen. CPU doesn’t check on I/O devices status continuously. I/O devices interrupt the CPU when it is ready. CPU time is not wasted. CPU can do other jobs during the time of I/O devices readiness.

76. ©Brooks/Cole, 2003 Figure 5-26 Direct Memory Access (DMA) CPU send a message to DMA Address of memory location Read or Write Number of bytes to be transferred When ready, DMA sends request for bus CPU stops using the buses and let DMA use them Data are transferred between disk and DMA

77. ©Brooks/Cole, 2003 Figure 5-27 DMA input/output This Method is used to transfer large amount of data between high speed I/O devices such as Disk and memory. In this method the CPU is idle for short time. However this idleness is very short compare to other methods. CPU is only idle during data transfer between DMA and memory

78. ©Brooks/Cole, 2003 TWO DIFFERENT ARCHITECTURES ARCHITECTURES 5.6