1. Symmetric and CC-NUMA

2. Scope zDesign experiences of SMPs and Coherent Cache Nonuniform Memory Access (CC- NUMA) zNUMA yNatural extension of SMP systems

3. Architectures Processor & Cache Interconnect Processor & Cache... I/O Memory Processor & Cache Bus/Crossbar Processor & Cache... I/O Memory Shared Memory logic structureSMP architecture Processor & Cache Bus/Crossbar Processor & Cache... I/O MemoryRemote Cache... Node 1 Processor & Cache Bus/Crossbar Processor & Cache... I/O MemoryRemote Cache Node N

4. Advantages of shard memory systems (SMP or CC-NUMA) zSymmetry yAny processor can access any memory location and I/O device zSingle address space ySingle system image yOne copy of OS, database app, etc xReside in the shared memory xUser no control over data distribution, redistribution ySingle OS schedules processes xEasy workload management, dynamic load balancing

5. Advantages of shard memory systems (SMP or CC-NUMA) zCaching yData locality supported in the hierarchy zCoherency yEnforced by the hardware? xMESI-like snoopy protocol zMemory Communication yLow latency xSimple load/store instructions xHardware generates coherency information

6. Basic Issues that SMPs must address zAvailability yBiggest problem yFailure of the bus, memory, OS !! zBottleneck yCompete for the memory bus and shard memory xPacket switched-bus (split transactions) zLatency yLow latency but still large compared to CPU zMemory bandwidth vs. Processor speed vs. Memory capacity zScalability yA bus is not scalable

7. CC-NUMA zExtends SMPs by connecting several SMP nodes into a larger system zEmploy directory based cache coherent protocol zWhile maintaining the advantages, attacks the scalability problem

8. Distributed shared memory enhances: zScalability yMemory capacity, I/O capabilities increase by adding more nodes zBandwidth yAn app can access multiple local memories concurrently zAvailability yMultiple copies of a portion of OS can run on multiple nodes xFailure of one will not disrupt the entire system

9. Programming zWe said that y“data structures get distributed” y“Cache coherency then tracks the changes” zAny issues? (remote cache vs local memory) yP, Q: processes yA, B: arrays P:Q: Phase 1:use(A)use(B) Phase 2:use(B)use(A)