1. Lab 1 Structure of a PLD Module M1.4 Experiment 1 (p. 40)

2. TTL Chips

3. TTL NAND, NOR, XOR

4. TTL Multiple-input Gates

5. Experiment 1

6. Experiment 1 (cont.)

7. [Out1] [Out0] X Y 9 5 [74x04] 8 6 [DIP switch][74x21] [74x32] 1 16 9 2 15108 3 1412 A 4 1313 1 3 [In4] 2 Z 5 12 1 6 11 2 6 7 10 4 B 8 9 5 X !X Y !Y

8. Experiment 1 (cont.) Logic Analyzer Hardware

9. Experiment 1 (cont.) PC Printer Port

10. Experiment 1 (cont.)

11. Experiment 1 (cont.) LOGIC2

12. Experiment 1 (cont.) Wire up circuit board Set dip switches to create the following gates: –AND gate –OR gate –XOR gate –NAND gate –NOR gate –XNOR gate

13. Experiment 1 (cont.) For each gate produce truth table by pressing function key F1 Print truth tables (2 per sheet) by pressing Shift-PrintScreen Label each truth table

14. Make 6 copies of this figure and show how you connected the jumpers to implement each of the following gates: AND, OR, NAND, NOR, XOR, XNOR