1. 1 Tecnologia CMOS I passi principali per la realizzazione di transistori a canale n e a canale p

2. 2 p substrate n-well p+ p substrate n-well n+ input output GNDVDD

3. 3 input output GNDVDD p substrate n-well p+ n+ +SiO 2

4. 4 p substrate SiO 2 photoresist n-well mask p substrate n-well p+ p substrate n-well n+

5. 5 p substrate SiO 2 photoresist n-well p substrate n-well p+ p substrate n-well n+

6. 6 p substrate n-well Nitride active mask photoresist p substrate n-well p+ p substrate n-well n+

7. 7 p substrate channel stop mask n-well p substrate n-well p+ p substrate n-well n+

8. 8 p substrate n-well n-well mask p substrate n-well p+ p substrate n-well n+

9. 9 p substrate n-well p substrate n-well p+ p substrate n-well n+

10. 10 p substrate n-well gate oxide p substrate n-well p+ p substrate n-well n+

11. 11 p substrate n-well polysilicon mask polysilicon p substrate n-well p+ p substrate n-well n+

12. 12 p substrate n-well n+ p substrate n-well n + mask gates p substrate n-well p+ p substrate n-well n+

13. 13 p substrate n-well p+ p substrate n-well n+ p + mask p substrate n-well p+ p substrate n-well n+

14. 14 p substrate n-well p+ p substrate n-well n+

15. 15 contact mask p substrate n-well p+ p substrate n-well n+ p substrate n-well p+ p substrate n-well n+

16. 16 p substrate n-well p+ p substrate n-well n+ metal1 mask p substrate n-well p+ p substrate n-well n+

17. 17 p substrate n-well p+ p substrate n-well n+ l w l R = t w = R S l w = R l w t input output GNDVDD

18. 18 p substrate n-well p+ p substrate n-well n+

19. 19 p substrate n-well p+ p substrate n-well n+

20. 20 p substrate n-well p+ p substrate n-well n+ input output GNDVDD

21. 21 p substrate n-well p+ p substrate n-well n+

22. 22 p substrate n-well p+ p substrate n-well n+