1. LOGO Low Power Solutions: A System Design Perspective Nik Sumikawa

2. Contents Low Power: Why? 1 Standard Embedded Solutions 2 Innovative Solutions33Solutions for Mobile Platforms44

3. Low Power: Why?  Power vs. Performance  Technology Scaling  VLSI  Embedded  Technology Trend  Green Stimulus  Scaling Size www.themegallery.com Company Logo

4. What You Should Think About  Low power design strategies  Components: Microcontrollers, peripherals, ect.  Low power design with hardware  Low power design with software  Low power design in mobile device www.themegallery.com Company Logo

5. Low Power Embedded Systems  TELOS:  Low power wireless embedded system  Low duty cycle principle  Minimizes dynamic power consumption www.themegallery.com Company Logo

6. Nik Sumikawa Low Duty Cycle Principle Wake Up Process Sleep Prep Deep Sleep Sleep Mode Timer or Interrupt event

7. Low Duty Cycle  Low processing to sleep ratio  Extended sleep period  Responsively:  fast wake-up and sleep times  Minimize Interrupts:  Context switching overhead Nik Sumikawa Company Logo

8. Low Duty Cycle: DMA  Direct Memory Access (DMA):  Controls bus and transfers data with minimal processor overhead  Significance  Transfer data while sleeping  Minimize processor overhead Nik Sumikawa Company Logo

9. Low Duty Cycle  Fails with significant processing  Alternatives:  Dynamic Voltage and Frequency Scaling (DVFS)  Dynamic Power Management (DPM) Nik Sumikawa Image: http://www.domainmagnate.com/wp- content/uploads/2009/03/failure-success.jpg

10. Nik Sumikawa Dynamic Power Dynamic Power P = CV dd 2 f Capacitance Frequency Voltage Energy Source Battery Design Variables

11. Reducing Dynamic Power  Dynamic Voltage and Frequency Scaling  Scale voltage when sleeping/Idle  Voltage term quad. proportional to power  Reduce frequency  Minimize line capacitance  Long traces have large capacitance www.themegallery.com Company Logo

12. Dynamic Power Management  Generalize power management  Multiple policies  Single-policy  Multiple-policy  Task-scaling www.themegallery.com Rajami and Brock [2]

13. Single-policy Strategy  Idle Scaling (IS)  Operate at full speed when processing workload  Reduce the frequency and voltage when idle  Goal:  Reduce the CPU and bus frequencies  Meet continuous DMA requirements  Provide acceptable latency when resuming from idle Nik Sumikawa Rajami and Brock [2]

14. Multi-policy Strategies  Load scaling (LS):  Balance system operating point with current or predicted processing demands  Run system with minimal idle time  Other:  Manage systems state based on status of the systems energy source Nik Sumikawa Rajami and Brock [2]

15. Task-scaling Strategies  Application scaling (AS):  Used for workloads that are difficult to power manage Audio and video processing Begin processing next sample immediately  Operate a lower operating point  Increases to higher operating point when it begins to fall behind. Nik Sumikawa Rajami and Brock [2]

16. Results of DPM  IS: Idle ScalingLS: Load ScalingAS: Application Scaling  Frame-Scaling (FS): perfect knowledge of processing requirements of video frame Nik Sumikawa Rajami and Brock [2]

17. Too Many Low Power States  Disadvantages:  Confusion  Wrong low power state  Solution:  Minimize the number of state  Decrease complexity Nik Sumikawa Image: http://kunaljanu.files.wordpress.com/2009/02/ ist2_1457667confusion-1.jpg

18. Sources of Power Consumption  Microcontroller  Bus architecture  On chip communication  External communication  Memory hierarchy  Peripherals Nik Sumikawa Rajami and Brock [2]

19. Communication Architectures  Advanced Microcontroller Bus Architecture  ARM bus protocol for system-on-a-chip (SOC)  Advanced High Performance Bus (AHB) Pipelined Memory mapped Up to 16 masters, 16 slaves  Advanced Peripheral Bus (APB) Non pipelined Single master, up to 16 peripherals Nik Sumikawa Rajami and Brock [2]

20. AMBA On-chip Bus Nik Sumikawa Rajami and Brock [2]

21. Power Profiling Nik Sumikawa Rajami and Brock [2]  86% power consumed by logic  14% power consumed by bus lines

22. Power Reduction Techniques  Power Management  Shut down bus interfaces to idle slaves  Bus Encoding  Reduces # of line transitions, but not bus transactions  Traffic Sequencing  Reduce multiple masters interleaving bus access Nik Sumikawa Rajami and Brock [2]

23. Power Reduction Techniques Nik Sumikawa Rajami and Brock [2]  No technique achieves large saving alone

24. Power vs Energy  Power is amount of energy over an amount of time (Watts = Joules / second)  Battery provides finite amount of energy  Goal: minimize energy use, not just power  In mobile systems we care about energy  Budget energy to prolong battery life Nik Sumikawa Rajami and Brock [2]

25. Static System Optimization  Compiler techniques  Instruction energy consumption profiling Done empirically  Instruction reordering Without affecting correctness Improve register utilization Reduce memory accesses Reduce pipeline stalls Nik Sumikawa

26. Static System Optimization  Code Compression  Post compilation static optimization  Reduces storage size of instructions  Can have a large impact  Requires complex design space exploration  Goal for mobile system: reduce power consumption while preserving performance Nik Sumikawa

27. Code Compression Challenges  Random access decompression  Defining decodable block beginnings  Jump to new locations in program without decoding all blocks between  Solutions  Begin compressed blocks on byte boundaries  Store translation table More efficient the compression, larger the table  Recalculate branch offsets to compressed addresses Nik Sumikawa

28. Code Compression Requirements  Additional hardware  Additional memory to store table  Decompression unit  Design decisions  Table generation/lookup  Compression technique Nik Sumikawa

29. Code Compression Implementation  SPARC ISA  Optimize consumption of complete SOC  Multiple iterations on binary  Instructions split into 4 categories  Group 1: immediate instructions (code = 0)  Group 2: branch instructions (code = 11)  Group 3: dictionary instructions (code = 100)  Group 4: uncompressed instr (code = 101) Nik Sumikawa

30. www.themegallery.com Company Logo Diagram Optimized Binary Compiled Binary Update branch offsets Branch compression Markov model Phase 4 Phase 3 Immediate compression Phase 2 Phase 1

31. As a Result…  Bus Compaction  Instructions transmitted no longer require entire bus  Use the extra lines to transmit the next compressed instruction Nik Sumikawa

32. Decompression Architecture  Pre-Cache  Decompression engine between memory/cache  Post-Cache  Decompression engine between cache/cpu Nik Sumikawa

33. Simulation  Full SOC simulation  7 sample apps run Nik Sumikawa

34. Results Nik Sumikawa

35. INCLUDE? Nik Sumikawa

36. Results  Net energy saving observed  22-82% power savings from code compression  What about additional hardware?  Bonus  Increased performance  Reduced area Nik Sumikawa

37. Verdict  Static power optimization  Potentially large payoff for little preprocessing  Still more sources of consumption  We’ve observed SOC savings  What about peripherals? Nik Sumikawa

38. Energy Budget Voice Call SMS Emails Pictures localization EnergyBudgetEnergyBudget

39. Nik Sumikawa Energy Budget: Localization  How much of the energy budget should be given to localization?  Depends on the user  Grant increase allotment when localization is a higher priority

40. Nik Sumikawa Localizations Methods 1 GPS Very accurate Power Hungry 2 GSM Lower accuracy Lower power requirement 3 WiFi Mod. Accurate Mod. Power requirement

41. Nik Sumikawa Constandache, Gaonkar, Sayler, Choudhury, Cox [3] Power vs. Precision Power: amount of energy required by peripheral in order to determine location Localization Precision: Accuracy of the device used for localization

42. Power Consumption www.themegallery.com Constandache, Gaonkar, Sayler, Choudhury, Cox [3]  30 Second sampling intervals  Power Consumption:  GPS: High baseline  WiFi: Low baseline with high spikes  GSM: Low baseline with varying spikes

43. Power Consumption www.themegallery.com Company Logo  30 Second sampling intervals  Results:  GPS: increased baseline

44. Localization Accuracy  Accuracy varied based on location  ALE: Average Location Error  Wifi and GSM oversampled www.themegallery.com Company Logo

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