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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Chapter 9 Memory Organization
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Chapter Outline Hierarchical Memory SystemsHierarchical Memory Systems Cache MemoryCache Memory Virtual MemoryVirtual Memory Pentium/Windows Memory SystemPentium/Windows Memory System
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Memory Hierarchy
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Associative Memory Data RegisterData Register
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Associative Memory Data RegisterData Register Mask RegisterMask Register
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Associative Memory Data RegisterData Register Mask RegisterMask Register Match RegisterMatch Register
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Associative Memory
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Associative Cache
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Data Lines/Blocks Multiple consecutive words form a lineMultiple consecutive words form a line
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Data Lines/Blocks Multiple consecutive words form a lineMultiple consecutive words form a line All data in a line is moved togetherAll data in a line is moved together
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Data Lines/Blocks Multiple consecutive words form a lineMultiple consecutive words form a line All data in a line is moved togetherAll data in a line is moved together Takes advantage of locality of referenceTakes advantage of locality of reference
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Associative Cache with a Line Size of 4 Bytes
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Direct Mapped Cache
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Direct Mapped Cache with a Line Size of 4 Bytes
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Drawbacks of Direct Mapped Cache 0000 0000 0000 0000: JUMP 1000H 0001 0000 0000 0000: JUMP 0000H
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Set-Associative Cache
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Set-Associative Cache with a Line Size of 4 Bytes
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Data Replacement Policies FIFOFIFO
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Data Replacement Policies FIFOFIFO LRULRU
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Data Replacement Policies FIFOFIFO LRULRU RandomRandom
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example
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Example
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Example
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Example
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Writing Data to Cache Write backWrite back Write throughWrite through Write allocateWrite allocate Write no-allocateWrite no-allocate
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Cache Performance Hits and missesHits and misses
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Cache Performance Hits and missesHits and misses Hit ratioHit ratio
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Cache Performance Hits and missesHits and misses Hit ratioHit ratio Average memory access timeAverage memory access time
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Cache Activity - Associative Cache
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Cache Activity - Associative Cache
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Cache Activity - Direct Mapped Cache
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Cache Activity - Direct Mapped Cache
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Cache Activity - 2-Way Set- Associative Cache
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Cache Activity - 2-Way Set- Associative Cache
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 2-Way Set-Associative Cache with a Line Size of 2
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 2-Way Set-Associative Cache with a Line Size of 2
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Virtual Memory Memory Management Unit (MMU)Memory Management Unit (MMU)
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Virtual Memory Memory Management Unit (MMU)Memory Management Unit (MMU) Swap disk/fileSwap disk/file
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Virtual Memory Memory Management Unit (MMU)Memory Management Unit (MMU) Swap disk/fileSwap disk/file Logical addressLogical address
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Virtual Memory Memory Management Unit (MMU)Memory Management Unit (MMU) Swap disk/fileSwap disk/file Logical addressLogical address Physical addressPhysical address
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Paging - Pages and Frames
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 MMU Configuration
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Page Table
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Address Conversion
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Translation Lookaside Buffer
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example
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Example
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Segmentation
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Fragmentation Internal fragmentationInternal fragmentation
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Fragmentation Internal fragmentationInternal fragmentation External fragmentationExternal fragmentation
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Fragmentation Internal fragmentationInternal fragmentation External fragmentationExternal fragmentation
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Beyond the Basics Split cacheSplit cache
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Beyond the Basics Split cacheSplit cache Multilevel page tableMultilevel page table
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Multilevel Page Table
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Pentium/Windows NT Memory Management 8 KB
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Pentium/Windows NT Cache Memory Management 16KB L1 split cache16KB L1 split cache –2-way set-associative –Line size of 32 bytes TLB used for cache and virtual memoryTLB used for cache and virtual memory Pseudo-LRU replacement policyPseudo-LRU replacement policy 256K L2 unified cache256K L2 unified cache –4-way set-associative
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Pentium/Windows NT Virtual Memory Management 4 GB address space4 GB address space –Low-order 2 GB for individual processes –High-order 2 GB for Windows NT components Uses paging, not segmentationUses paging, not segmentation 10-bit page directory pointer + 10-bit offset10-bit page directory pointer + 10-bit offset Uses the same TLBs as cache memoryUses the same TLBs as cache memory
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Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Summary Hierarchical Memory SystemsHierarchical Memory Systems Cache MemoryCache Memory Virtual MemoryVirtual Memory Pentium/Windows Memory SystemPentium/Windows Memory System
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