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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Program design and analysis zSoftware modem.
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Theory of operation zFrequency-shift keying: yseparate frequencies for 0 and 1. time 0 1
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. FSK encoding zGenerate waveforms based on current bit: bit-controlled waveform generator 0110101
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. FSK decoding A/D converter zero filter one filter detector 0 bit detector 1 bit
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Transmission scheme zSend data in 8-bit bytes. Arbitrary spacing between bytes. zByte starts with 0 start bit. zReceiver measures length of start bit to synchronize itself to remaining 8 bits. start (0)bit 1bit 2bit 3bit 8...
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Requirements
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Specification Line-in* input() Receiver sample-in() bit-out() 11 Transmitter bit-in() sample-out() Line-out* output() 11
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. System architecture zInterrupt handlers for samples: yinput and output. zTransmitter. zReceiver.
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Transmitter zWaveform generation by table lookup. yfloat sine_wave[N_SAMP] = { 0.0, 0.5, 0.866, 1, 0.866, 0.5, 0.0, -0.5, -0.866, -1.0, - 0.866, -0.5, 0}; time
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Receiver zFilters (FIR for simplicity) use circular buffers to hold data. zTimer measures bit length. zState machine recognizes start bits, data bits.
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Hardware platform zCPU. zA/D converter. zD/A converter. zTimer.
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Component design and testing zEasy to test transmitter and receiver on host. zTransmitter can be verified with speaker outputs. zReceiver verification tasks: ystart bit recognition; ydata bit recognition.
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. System integration and testing zUse loopback mode to test components against each other. yLoopback in software or by connecting D/A and A/D converters.
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