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Bulk MEMS 2014, Part 1 sami.franssila@aalto.fi
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Types of MEMS Bulk MEMS: anisotropic wet or DRIE of bulk silicon SOI MEMS: DRIE or wet etching of SOI wafers Surface MEMS: thin films on top of a wafer Integrated MEMS: CMOS and MEMS on same chip
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Bulk MEMS
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Bulk MEMS: backside vs. front side machining
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SOI MEMS
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Surface MEMS http://phys.org/news/2010-12-panasonic- imec-thin-packaged-mems.html "Physics and Technology of Silicon Carbide Devices", book edited by Yasuto Hijikata,
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CMOS-MEMS a b b) single crystal silicon MEMS by backside DRIE a) thin film MEMS by front side dry plasma release;
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Aspects of MEMS integration Bulk and SOI MEMS are highly 3D Bulk and SOI MEMS are often double sided DRIE & KOH etching Bonding often involved Package to accomodate moving parts
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Wafer bonding direct bonding: Si/Si, glass/glass, PMMA/PMMA,…a.k.a. fusion bonding anodic bonding (AB): Si/glass, glass/Si/glass thermo-compression bonding (TCB): Au-Au eutectic bonding: Si/Au (363 o C) glass frit bonding: glass melting adhesive bonding: “glues” applied, any substrate
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Basic requirements for bonding Wafers are flat (no centimeter scale wavyness) Wafer are smooth (not rough on atomic/nanometer scale) Materials form chemical bonds across their interface High stresses are avoided No interface bubbles develop
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Bonding
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Alkaline anisotropic etchants EtchantKOHTMAH Rate (at 80 o C)1 µm/min0.5 Typical concentration40%25% Selectivity (100):(111)200:130:1 Selectivity Si:SiO 2 200:12000:1 Selectivity Si:Si 3 N 4 2000:12000:1 Etch stop factor 10100 (10 20 cm -3 )
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Membrane formation Nitride membrane; no timing needed Timed silicon membrane; thickness depends on etch rate and wafer thickness control. Thin membrane thickness control bad. SOI wafer, membrane thickness determined by SOI device layer thickness
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Boron etch stop = highly doped silicon not etched in KOH
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Piezoresistive pressure sensor Boron doped p++ membrane is a passive structure ! Active elements consist of the deposited polysilicon resistors.
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Boron etch stop for AFM b a c a)oxide masked etching of tip; b)b) p++ boron doping on front side; c)KOH etching from backside, stopping on p++ layer.
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Convex corner undercutting From: Maluf
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Undercut by misorientation or design
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Membrane structures by surface micromachining
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Undercutting & corner compensation Without compensation With compensation Corner not sharp, but narrow slit Corner sharp but wide slits
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Corner compensation structures
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Etching mesas and pyramids H.Schröder, E. Obermeier, A. Horn, G. Wachutka, Convex Corner Undercutting of {100} Silicon in Anisotropic KOH Etching, J. Microelectromechanical Systems, v. 10 (1) March 2001, p.88 Mask undercut will lead eventually to a pyramid
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20% KOH 100 um 20% KOH + 5% IPA 100 um Adding IPA reduces the underetch, and similarly many surfactants change crystal plane selectivity Undercutting depends on exact etch chemistry and conditions
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Peeling mask Figure 20.4 a b Fig. 21.17 Also known as nested mask
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Thermal pressure sensor (2) heat sink heater resistor thermopile nitride p0p0 p0p0 p1p1
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Thermal pressure sensor (2)
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Membrane formation Nitride membrane; no timing needed Timed silicon membrane; thickness depends on etch rate and wafer thickness control. Thin membrane thickness control bad. SOI wafer, membrane thickness determined by SOI device layer thickness
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Piezoresistive pressure sensor Boron doped p++ membrane is a passive structure ! Active elements consist of the deposited polysilicon resistors.
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Micro hot plate: nitride membrane Pt heater Nitride Pt measurement electrodes sensor material oxide
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