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EECT 7327 Data Converters Professor Yun Chiu © 2014 Erik Jonsson School of Electrical Engineering and Computer Science University of Texas at Dallas.

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Presentation on theme: "EECT 7327 Data Converters Professor Yun Chiu © 2014 Erik Jonsson School of Electrical Engineering and Computer Science University of Texas at Dallas."— Presentation transcript:

1 EECT 7327 Data Converters Professor Yun Chiu © Erik Jonsson School of Electrical Engineering and Computer Science University of Texas at Dallas

2 Logistics Instructor: Professor Yun Chiu E-Mail: chiu.yun@utdallas.edu
Office Hour: Tuesday, 2-4 pm, in ECSN 3.602 TA: TBA TA Office Hour: TBA Website: Lecture notes, handouts, project assignments, etc. will be posted on the website (no paper copy will be distributed in class)

3 Prerequisites Analog circuit design Digital signal processing
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Prerequisites Analog circuit design EECT 6326 (Analog IC Design), or equivalent at the level of G&M, Razavi, or similar books Digital signal processing EE 4361 (Digital Signal Processing), or equivalent at the level of O&S or similar books Digital circuit design Basic knowledge of gate/transistor-level logic design (logic family, sequential logic, etc.) Some knowledge of AHDL or Verilog-A is helpful for the project

4 Course Outline (not in order)
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Course Outline (not in order) Switched-capacitor circuit techniques and realization SC amplifier and SC integrator Review of topics in sampled-data signal processing Sample-and-hold amplifier (SHA) Nyquist-rate data converters Flash, algorithmic/cyclic, SAR, pipeline, subranging, etc. Oversampled data converters Single-loop, MASH, multi-bit, continuous-time, etc. Precision techniques for data conversion Digital calibration, digital assistance, and digital post-processing Data converter testing and benchmarks Technology trend and figure-of-merit (FoM) Advanced topics (if time allows)

5 Lecture Notes & Textbook
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Lecture Notes & Textbook Textbook: No required textbook. Lecture notes, slides, and papers will be posted on the course website. References Analog circuit design Gray, et al., Analysis and Design of Analog Integrated Circuits, 4th Ed., Wiley, 2001 Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001 Johns and Martin, Analog Integrated Circuit Design, Wiley, 1997 Allen and Holberg, CMOS Analog Circuit Design, 2nd Ed., Oxford, 2002 Data converters Razavi, Principles of Data Conversion System Design, IEEE Press, 1995 van de Plassche, CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters, 2nd Ed., Kluwer, 2003 Norsworthy et al., Delta-Sigma Data Converters: Theory, Design, and Simulation, Wiley, 1996 Switched-capacitor circuits Gregorian and Temes, Analog MOS Integrated Circuits for Signal Processing, Wiley, 1986

6 CAD Tools CAD Tools required: CAD Tools recommended: SpectreRF
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 CAD Tools CAD Tools required: SpectreRF SPICE-type analyses: .dc, .ac, .xf, .noise, .tran, etc. Additional capabilities: pss, pac, pxf, pnoise, pdisto to analyze large-signal nonlinear circuits (e.g., switched-capacitor circuits, RF circuits) MATLAB, Simulink Mixed-domain behavioral modeling, analog/digital filter synthesis, etc. CAD Tools recommended: Cadence GUI suite (awd, ocean, icfb, msfb, icde, icms, etc.) for design entry, simulation, waveform display, etc.

7 Projects, Exam, and Grading
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Projects, Exam, and Grading A series of three phases of a nearly semester-long term project to build a X-bit, Y-MS/s Z-type CMOS ADC… Midterm exam: 30% (TBA) Term Project: 70% Phase I: 20% (assigned in 4th week) Phase 2: 20% (assigned in 7th week) Phase 3: 30% (assigned in 10th week) Project presentation: 5% (in class, last day of instruction) Grading Policy: Projects are to be completed by two-student groups, with each group submitting a joint report (and SPICE decks) in each phase. Grading in each phase will be independent, i.e., based on phase-specific goals and specifications.

8 Isn’t Digital Great Enough?
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Why This Course? Isn’t Digital Great Enough?

9 Advantages of Digital VLSI
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Advantages of Digital VLSI Noise immunity, robustness Unlimited precision or accuracy Flexibility, programmability, and scalability Electronic design automation (EDA) tools widely available and successful Benefiting from Moore’s law – “The number of transistors on a chip doubles every 18 months,” IEDM, 1975 Cost/function drops 29% every year That’s 30X in 10 years

10 Data Converters Introduction Professor Y. Chiu
EECT Fall 2014 Moore’s Law 2004 International Technology Roadmap of Semiconductor (

11 Data Converters Introduction Professor Y. Chiu
EECT Fall 2014 Moore’s Law “If GM had kept up with technology like the computer industry has, we would all be driving $25 cars that got 1,000 miles to the gallon…” – Bill Gates, COMDEX keynote Technology Scaling

12 Just Digital is far from enough…
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Just Digital is far from enough… Paul Gray’s eggshell diagram

13 Challenges for Analog Sensitive to noise – SNR (signal-to-noise ratio)
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Challenges for Analog Sensitive to noise – SNR (signal-to-noise ratio) Subject to device nonlinearities – THD (total harmonic distortion) Sensitive to device mismatch and process variations Difficult to design, simulate, layout, test, and debug Inevitable, often limits the overall system performance/cost Scaling scenario outlook High-speed, low-resolution applications benefit High SNR design difficult to scale with low supply voltages

14 Example 1 – Mixed-Signal Hearing Aid
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Example 1 – Mixed-Signal Hearing Aid 0.5 0.1 0.01 0.001 Normalized frequency -150 -50 -100 [dB]

15 Example 2 – PRML Read Channel
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Example 2 – PRML Read Channel

16 Example 3 – RF Transceiver
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Example 3 – RF Transceiver Desirable Channel

17 Example 3 – RF Transceiver
Data Converters Introduction Professor Y. Chiu EECT Fall 2014 Example 3 – RF Transceiver Small form factor, high integration, more functions, low power Market/economy is the ultimate driving force Future A D Ericsson Bluetooth (CMOS, 2001) CMOS? or something else? Ericsson CH388 (Hybrid, 1995) Berkäna GSM/GPRS (CMOS, 2005) Past Present


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