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1 Computer Engineering Department Islamic University of Gaza ECOM 6301: Selected Topics in Computer Architectures (Graduate Course) Fall 2014-2015 Prof. Mohammad A. Mikki Room I215 Tel. Ext. 2876 email: mmikki@iugaza.edu.ps Homepage: http://site.iugaza.edu.ps/mmikki/ Skype: mohammad.mikki
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Lecture 1 Syllabus
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3 Mohammad A. Mikki Professor of Computer Engineering ECE Department, Faculty of Engineering Instructor
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Where to find me 4 My Office:IT bldg: Room I215 Office Hours: My Email: mmikki@iugaza.edu.ps My homepage:http://site.iugaza.edu.ps/mmikki/ Skype: mohammad.mikki Tel.: +970-8-2860700 Ext. 2876 Fax: +970-8-2860800
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Course Information Course Code: ECOM 6301 (Graduate Course) Course Name: Selected Topics in Computer Architectures Number of credits: 3 5
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Course Description Fundamentals of Computer Architecture Instruction Level Parallelism (ILP) and Its Exploitation Advanced Techniques for Exploiting Instruction-Level Parallelism and Their Limits Multiprocessors and Thread-Level Parallelism Multiprocessors & Multicore, cache coherence Basic Pipelining Pipelining, Performance Memory Hierarchy Design Caches Virtual Memory Dynamic Execution SIMD & GPU Interconnection Networks 6
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Course Outcomes/Objectives At completion of the course students should be able to: Measure and report computer performance using appropriate, quantitative analysis. Describe the main architectural approaches to improve computer performance, analyze the pros and cons of approaches, and decide when to employ different architectural ideas for different applications. Identify which factors affect the performance and power consumption of a computer system, and evaluate and compare how various architectural-level features impact power/performance. Explain how multi-core hardware can impact software performance (for better and for worse), and how to target software development for multi-core systems. Summarize and explain research results from various computer architecture centric journals and conferences. 7
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Course Website http://moodle.iugaza.edu.ps please check this webpage at least once a week for lecture notes, homework assignments, solutions, useful links, supplementary material, announcements 8
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Class Information Class day, Time, and location - Class hours: Tue. 2:00pm-5:00pm - Location: Room I607 9
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Required Textbook and Material We will cover selected chapters/sections from: Computer Architecture: A Quantitative Approach 5 th Ed. John L. Hennessy and David A. Patterson The Morgan Kaufmann Series in Computer Architecture and Design,2011, ISBN: ISBN: 978-0-12-383872-8 10
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Additional Required Material Selected research papers 11
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Working Schedule 12 WeekTopicLecture Readings 5th Edition Assignments 1Introduction Syllabus Introduction to the course Ch. 1: Introduction Ch. 1 of textRead appendix A 2Introduction Ch. 1: Introduction Course project suggested topics handed out Ch. 1 of text 3Introduction Ch. 1: IntroductionCh. 1 of text Submit research project proposal Quiz 1 4 Future trends in computer architecture The future of microprocessors 21 st century computer architecture Quiz 2 5 ISA- RISC and CISC ISA and beyond Revisiting the RISC vs. CISC Debate Quiz 3 6Amdahl’s law Amdahl law in the multicore era Extending Amdahl’s law for Energy-Efficient Computing in the Many-Core Era Quiz 4
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Working Schedule 13 7 Single chip multiprocessor The Case for a Single-Chip Multiprocessor Dark Silicon and the End of Multicore Scaling Submit first research project report Quiz 5 8 Tomasulo’s Algorithm An Efficient Algorithm for Exploiting Multiple Functional Units INSTRUCTION ISSUE LOGIC FOR HIGH-PERFORMANCE, INTERRUPTABLE P1PELINED PROCESSORS Quiz 6 9 Shared Memory Consistency Shared Memory Consistency Models - A Tutorial Quiz 7 10Project presentation Second research project report presentation Submit second research project report WeekTopicLecture Readings 5th Edition Assignments
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Working Schedule 14 11Superscalar microprocessor MIPS R10K superscalar microprocessor Design of the HP PA 7200 CPU Quiz 8 12SIMD Libra -Tailoring SIMD Execution using Heterogeneous Hardware and Dynamic Configurability Cray1 computer system Quiz 9 13GPU-Vector processing The GPU computing Era REDEFINING THE ROLE OF THE CPU IN THE ERA OF CPU- GPU INTEGRATION The Architecture and Evolution of CPU-GPU Systems Quiz 10 WeekTopicLecture Readings 5th Edition Assignments
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Working Schedule 15 14 Power constraint Power - A First Class Design Constraint Intel Pentium M processor Power Estimation Quiz 11 15 Project presentation Final research project report presentation Submit final research project report Last day of classes First day of final exams WeekTopicLecture Readings 5th Edition Assignments
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Textbook Table of Contents Printed Text Chap 1: Fundamentals of Quantitative Design and Analysis Chap 2: Memory Hierarchy Design Chap 3: Instruction-Level Parallelism and Its Exploitation Chap 4: Data-Level Parallelism in Vector, SIMD, and GPU Architectures Chap 5: Multiprocessors and Thread-Level Parallelism Chap 6: The Warehouse-Scale Computer App A: Instruction Set Principles App B: Review of Memory Hierarchy App C: Pipelining: Basic and Intermediate Concepts 16
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Textbook Table of Contents Online – download from our companion site (below) App D: Storage Systems App E: Embedded Systems App F: Interconnection Networks App G: Vector Processors App H: Hardware and Software for VLIW and EPIC App I: Large-Scale Multiprocessors and Scientific Applications App J: Computer Arithmetic App K: Survey of Instruction Set Architectures App L: Historical Perspectives 17
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Grading Scheme Research Project40% Paper presentation and review20% Quizzes30% Class participation (attendance, discussion, forums and wikis through moodle) 10% 18
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Quizzes 10 quizzes Roughly one quiz per week 19
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20 Any Questions
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