1. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Chapter 8 Computer Arithmetic

2. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Chapter Outline Unsigned notationsUnsigned notations Signed notationsSigned notations Binary Coded DecimalBinary Coded Decimal Specialized arithmetic hardwareSpecialized arithmetic hardware Floating point numbersFloating point numbers IEEE 754 floating point standardIEEE 754 floating point standard

3. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Unsigned Notations Unsigned non-negativeUnsigned non-negative Unsigned two’s-complementUnsigned two’s-complement

4. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Unsigned Notations Unsigned non-negativeUnsigned non-negative Unsigned two’s-complementUnsigned two’s-complement

5. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Addition: X  X + Y

6. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Overflow

7. Subtraction: X  X - Y

8. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Overflow

9. Multiplication A non-optimal methodA non-optimal method z = 0 FOR i = 1 TO y DO { z = z + x }

10. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Multiplication A more typical methodA more typical method

11. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Multiplication Calculating running totalsCalculating running totals

12. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Multiplication Shifting partial results to align sumsShifting partial results to align sums

13. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Shift-add Multiplication Algorithm C = 0, U = 0;

14. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example: UV  X  Y (X = 1101, Y = 1001) C = 0, U = 0 0

15. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 RTL Code C  0, U  0, i  n

16. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example: UV  X  Y (X = 1101, Y = 1001) C  0, U  0, i  4 0

17. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Hardware Implementation

18. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Optimizing the RTL Code UV  X  VUV  X  V Register Y not neededRegister Y not needed One operand is lostOne operand is lost

19. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Optimizing the RTL Code C  0, U  0

20. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example C  0, U  0, i  4 0

21. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Booth’s Algorithm Multiplying unsigned 2’s-complement numbersMultiplying unsigned 2’s-complement numbers

22. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example UV  X  Y, X = -3 (1101), Y = -5 (1011)UV  X  Y, X = -3 (1101), Y = -5 (1011)

23. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example UV  X  Y, X = -3 (1101), Y = -5 (1011)UV  X  Y, X = -3 (1101), Y = -5 (1011)

24. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 RTL Code

25. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example

26. Optimized RTL Code

27. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Hardware Implementation

28. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Division A non-optimal methodA non-optimal method

29. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Division A more typical methodA more typical method

30. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Division Shifting results to align remaindersShifting results to align remainders

31. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Shift-subtract Division Algorithm

32. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example: UV  X (UV = 1001 0011, X = 1101)

33. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 RTL Code

34. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example

35. Hardware Implementation

36. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Restoring Division Algorithm

37. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Overflow Comparison

38. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example

39. RTL Code

40. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example

41. Hardware Implementation

42. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Signed Notations Signed-magnitudeSigned-magnitude

43. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Signed Notations Signed-magnitudeSigned-magnitude Signed-2’s complementSigned-2’s complement

44. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Signed Notations Signed-magnitudeSigned-magnitude Signed-2’s complementSigned-2’s complement Value Signed-magnitude Signed-2’s complement +3 0 0011 0 0011 +3 0 0011 0 0011 -3 1 0011 1 1101 -3 1 0011 1 1101

45. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Addition and Subtraction

46. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 RTL Code

47. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 RTL Code

48. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Examples

49. Examples

50. Examples

51. Hardware Implementation

52. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Multiplication

53. Example

54. Binary Coded Decimal (BCD) Every 4 bits = 1 decimal digitEvery 4 bits = 1 decimal digit 1 bit sign1 bit sign Example: +27 = 0 0010 0111Example: +27 = 0 0010 0111

55. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 BCD Adder

56. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Nine’s Complement Equivalent of 1’s complement in binaryEquivalent of 1’s complement in binary

57. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Nine’s Complement Equivalent of 1’s complement in binaryEquivalent of 1’s complement in binary

58. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 RTL Code

59. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Examples

60. Examples

61. Examples

62. Hardware Implementation

63. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Multiplication dshr: decimal shift rightdshr: decimal shift right

64. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Multiplication dshr: decimal shift rightdshr: decimal shift right

65. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example

66. Arithmetic Pipelines Increase throughputIncrease throughput

67. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Arithmetic Pipelines Increase throughputIncrease throughput Speedup:Speedup:

68. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example

69. Example

70. Example

71. Steady State Speedup

72. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Steady State Speedup

73. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Speedup with Latch Delays

74. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Speedup with Latch Delays

75. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Lookup Tables

76. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example

77. Wallace Trees Carry Save AdderCarry Save Adder

78. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Wallace Trees Carry Save AdderCarry Save Adder

79. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Wallace Trees Partial productsPartial products

80. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Wallace Trees Partial productsPartial products

81. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example

82. Example

83. 4  4 Wallace Tree

84. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 8  8 Wallace Tree

85. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Floating Point Numbers Sign, Significand, ExponentSign, Significand, Exponent Normalized:Normalized: -1234.5678 = -.12345678  10 4 -1234.5678 = -.12345678  10 4 NaNNaN BiasingBiasing

86. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Floating Point Numbers PrecisionPrecision GapGap RangeRange Round, Guard, Sticky bitsRound, Guard, Sticky bits

87. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Rounding Round toward nearestRound toward nearest Round toward 0Round toward 0 Round toward + Round toward +  Round toward - Round toward - 

88. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example

89. Addition and Subtraction

90. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Addition and Subtraction

91. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 RTL Code

92. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example: (.1101  2 3 ) + (.1110  2 2 )

93. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example: (.1101  2 3 ) - (.1110  2 2 )

94. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Multiplication Check for special valuesCheck for special values Add exponentsAdd exponents Multiply significandsMultiply significands Normalize resultNormalize result

95. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 RTL Code

96. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Example: (.1101  2 3 )  (.1110  2 2 )

97. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 IEEE 754 Floating Point Standard 1  significand < 21  significand < 2 Single of double precisionSingle of double precision

98. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 IEEE 754 Floating Point Standard IEEE 754 Floating Point Standard

99. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 IEEE 754 Floating Point Standard

100. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Denormalized Values Used to express smaller numbers than possible with normalized notationUsed to express smaller numbers than possible with normalized notation Smallest normalized value: 2 -126 (single precision)Smallest normalized value: 2 -126 (single precision) Smallest denormalized value: 2 -149 (single precision)Smallest denormalized value: 2 -149 (single precision)

101. Images courtesy of Addison Wesley Longman, Inc. Copyright © 2001 Summary Unsigned notationsUnsigned notations Signed notationsSigned notations Binary Coded DecimalBinary Coded Decimal Specialized arithmetic hardwareSpecialized arithmetic hardware Floating point numbersFloating point numbers IEEE 754 floating point standardIEEE 754 floating point standard