Presentation is loading. Please wait.

Presentation is loading. Please wait.

Accelerating IEC Packet Processing and Networking

Similar presentations


Presentation on theme: "Accelerating IEC Packet Processing and Networking"— Presentation transcript:

1 Accelerating IEC 61850 Packet Processing and Networking
SoCe System-on-Chip engineering The SoCe Difference – Accelerating IEC Packet Processing and Networking CIGRE 2014

2 SoCe Index: Challenges for IEC 61850 Critical Messages
System-on-Programmable-Chip Solution Low-Latency Forwarding Time for HSR GOOSE and SMV HW Packet Processing Cyber-Security Suite How to benefit from it? IPs Portfolio Out-of-the-Box Modules Reference Design Index:

3 Challenges for IEC 61850 Critical Messages:
P1 Class TT6 Transfer Time =< 3ms (IEC ) Transfer Time=ta+tb+tc ta tb tc tapplic F1 (DSP, Sensor, actuator, etc.) Communication Processor Communication Processor F2 (DSP, Sensor, actuator, etc.) Physical Device 1 Physical Device 2 The total transmission time shall be below the order of a quarter of a cycle (5ms for 50Hz, 4ms for 60Hz) Need for addressing complex and big Network Enhancing reaction time

4 System-on-Programmable-Chip (SoPC) Solution:
Zynq SoC Extensible Platform: Smart Device for Substation Automation Systems F1 (DSP, Sensor, actuator, etc.) Communication Processor Physical Device 1 Control CPU + DSP Communication Processor IEDs: Faster Low-Power Flexible and Extensible Upgradable Reusable

5 Cyber-Security Suite (HW/SW)
SoPC Solution: Low-Latency Forwarding Time for HSR Processing System Memory Interfaces 7 Series Programmable Logic On-Chip bus DSP AXI4 SENSORS ADC UART1 ARM ® Cortex TM-A9 (X2) UART0 DATA IF. GMAC1 On-Chip bus GMAC0 Other peripherals CONTROL SW GOOSE and SMV HW Packet Processing AXI4 DATA IF. PTP Suite (HW/SW) Cyber-Security Suite (HW/SW) COMM IF. On-Chip bus AXI4 PORT B PORT E PORT A 1588 P2P PORT C 1588 P2P Switch PORT B 1588 P2P PORT D 1588 P2P Low-latency HSR paths Low-latency HSR paths HSR/PRP Switch IP Zynq® Platform ® SoC Minimizing tb Synchronized IEC Network Messages Constant and minimized switching times in each node (cut-through) IEEE 1588 autonomous P2P link delay measurement by hardware in each port switch SAN Interlink DESTINATIONS A_frame (HSR) B_frame (HSR) C_frame D_frame A B DANH SOURCE Red Box

6 Cyber-Security Suite (HW/SW)
SoPC Solution: GOOSE and SMV HW Packet Processing Processing System Memory Interfaces 7 Series Programmable Logic On-Chip bus DSP AXI4 SENSORS ADC UART1 ARM ® Cortex TM-A9 (X2) UART0 DATA IF. GMAC1 On-Chip bus GMAC0 Other peripherals CONTROL SW GOOSE and SMV HW Packet Processing AXI4 DATA IF. PTP Suite (HW/SW) Cyber-Security Suite (HW/SW) COMM IF. On-Chip bus AXI4 PORT B PORT E PORT A 1588 P2P PORT C 1588 P2P Switch PORT B 1588 P2P PORT D 1588 P2P Low-latency HSR paths Low-latency HSR paths HSR/PRP Switch IP Zynq® Platform ® SoC Minimizing ta tc (and optimizing tapplic) GOOSE and SMV messages management by hardware Message composition and reception Seamless injection into the network Subscription management HW/SW IEC SW stack DSP or actuator control integrated in the FPGA section (tapplic optimization)

7 Cyber-Security Suite (HW/SW)
SoPC Solution: Cyber-Security Suite Processing System Memory Interfaces 7 Series Programmable Logic On-Chip bus DSP AXI4 SENSORS ADC UART1 ARM ® Cortex TM-A9 (X2) UART0 DATA IF. GMAC1 On-Chip bus GMAC0 Other peripherals CONTROL SW GOOSE and SMV HW Packet Processing AXI4 DATA IF. PTP Suite (HW/SW) Cyber-Security Suite (HW/SW) COMM IF. On-Chip bus AXI4 PORT B PORT E PORT A 1588 P2P PORT C 1588 P2P Switch PORT B 1588 P2P PORT D 1588 P2P Low-latency HSR paths Low-latency HSR paths HSR/PRP Switch IP Zynq® Platform ® SoC Handling efficiently IEC 62351 Cryptographic Algorithms implementable in Software or in Hardware Dynamic Cryptographic Algorithms allocation Direct Kernel Management Port blocking by hardware

8 How to benefit from it?: IPs portfolio
Name Dev. Description Sectors HSR/PRP Switch S6, Zynq-7S Redundant Ethernet with IEEE1588 Energy, Transportation, Automation, Aerospace Unmanaged Ethernet Switch (UES) Multiport Ethernet Switch with IEEE1588 Transparent Clock. Combinable with HSR/PRP Switch ISM, Industrial Ethernet, Aerospace Managed Ethernet Switch (MES) Multiport Ethernet Switch with 1588 Transparent Clock, managed (VLAN, manual access to MAC table) ISM, Industrial Ethernet, , Aerospace Industrial Ethernet IPs Profinet IP, Ethernet IP Energy, ISM, Wireless Irigb and IEEE v2 IPs Sub-microsecond synchronization using Ethernet. Three IPs for different IEEE 1588 modes Full IEEE 1588 solution for Zynq Zynq IP an software. Seamless integration with UES for 1588-aware solution on Zynq

9 How to benefit from it?: Modules and Reference Designs
Name Description Key features NEToem Ready to use HSR/PRP/1588 solution for Fast Ethernet copper 4 integrated Ethernet Phyters Industrial grade SMARToem family Ready to use HSR/PRP/1588 solution for Fast Ethernet copper/fiber Up to 6 integrated Ethernet Combo Phyters Compatible (size, pins) with other modules Design open to customer NETBox Development-kit and ready to use HSR/PRP RedBox JTAG, PMODs, Graphic Display

10 How to benefit from it?: Modules and Reference Designs
SMARToem family

11 How to benefit from it?: Not only high-end (SoPC) devices!

12 SoCe System-on-Chip engineering, S.L. Zitek Bilbao - ETSI
C/Jose Maria Escuza 23; Entr. D.D. 48013-Bilbao (Bizkaia) Spain Phone: WEB:


Download ppt "Accelerating IEC Packet Processing and Networking"

Similar presentations


Ads by Google