1. ECE 331 – Digital System Design
Multiplexers and Demultiplexers,
and
Encoders and Decoders
(Lecture #15)
The slides included herein were taken from the materials accompanying
Fundamentals of Logic Design, 6th Edition, by Roth and Kinney,
and were used with permission from Cengage Learning.

2. Material to be covered …
Supplemental
Chapter 9: Sections 1 – 4
Fall 2010
ECE Digital System Design

3. ECE 331 - Digital System Design
Multiplexers
Fall 2010
ECE Digital System Design

4. ECE 331 - Digital System Design
Multiplexers
A multiplexer has
N control inputs
2N data inputs
1 output
A multiplexer routes (or connects) the selected data input to the output.
The value of the control inputs determines the data input that is selected.
Fall 2010
ECE Digital System Design

5. ECE 331 - Digital System Design
Multiplexers
Data
inputs
Z = A′.I0 + A.I1
Control
input
Fall 2010
ECE Digital System Design

6. ECE 331 - Digital System Design
Multiplexers
MSB
LSB A B F I0 1 I1 I2 I3
Z = A′.B'.I0 + A'.B.I1 + A.B'.I2 + A.B.I3
Fall 2010
ECE Digital System Design

7. ECE 331 - Digital System Design
Multiplexers
MSB
LSB A B C F I0 1 I1 I2 I3 I4 I5 I6 I7
Z = A′.B'.C'.I0 + A'.B'.C.I1 + A'.B.C'.I2 + A'.B.C.I3 +
A.B'.C'.I0 + A.B'.C.I1 + A'.B.C'.I2 + A.B.C.I3
Fall 2010
ECE Digital System Design

8. ECE 331 - Digital System Design
Multiplexers
Fall 2010
ECE Digital System Design

9. 8-to-1 Multiplexer in VHDL
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ECE Digital System Design

10. 8-to-1 Multiplexer in VHDL
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ECE Digital System Design

11. Multiplexers Exercise: Design an 8-to-1 multiplexer using
4-to-1 and 2-to-1 multiplexers only.
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ECE Digital System Design

12. Exercise: Design a 16-to-1 multiplexer using 4-to-1 multiplexers only.
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ECE Digital System Design

13. ECE 331 - Digital System Design
Multiplexer (Bus)
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ECE Digital System Design

14. ECE 331 - Digital System Design
Demultiplexers
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ECE Digital System Design

15. ECE 331 - Digital System Design
Demultiplexers
A demultiplexer has
N control inputs
1 data input
2N outputs
A demultiplexer routes (or connects) the data input to the selected output.
The value of the control inputs determines the output that is selected.
A demultiplexer performs the opposite function of a multiplexer.
Fall 2010
ECE Digital System Design

16. ECE 331 - Digital System Design
Demultiplexers
Out0 In S1 S0 I W X Y Z A B
Out1
Out2
Out3
W = A'.B'.I
X = A.B'.I
Y = A'.B.I
Z = A.B.I A B W X Y Z I 1
Fall 2010
ECE Digital System Design

17. ECE 331 - Digital System Design
Decoders
Fall 2010
ECE Digital System Design

18. ECE 331 - Digital System Design
Decoders
A decoder has
N inputs
2N outputs
A decoder selects one of 2N outputs by decoding the binary value on the N inputs.
The decoder generates all of the minterms of the N input variables.
Exactly one output will be active for each combination of the inputs.
What does “active” mean?
Fall 2010
ECE Digital System Design

19. ECE 331 - Digital System Design
Decoders B W X Y Z I0 I1 A
Out0
Out1
Out2
Out3
W = A'.B'
X = A.B'
Y = A'.B
Z = A.B
msb
Active-high outputs A B W X Y Z 1
Fall 2010
ECE Digital System Design

20. ECE 331 - Digital System Design
Decoders B W X Y Z I0 I1 A
Out0
Out1
Out2
Out3
W = (A'.B')'
X = (A.B')'
Y = (A'.B)'
Z = (A.B)'
msb
Active-low outputs A B W X Y Z 1
Fall 2010
ECE Digital System Design

21. ECE 331 - Digital System Design
Decoders
msb
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ECE Digital System Design

22. ECE 331 - Digital System Design
3-to-8 Decoder in VHDL
Fall 2010
ECE Digital System Design

23. ECE 331 - Digital System Design
3-to-8 Decoder in VHDL
Fall 2010
ECE Digital System Design

24. ECE 331 - Digital System Design
Decoder with Enable
high-level
enable
Enable B W X Y Z I0 I1 A
Out0
Out1
Out2
Out3 En En A B W X Y Z 1 x
enabled
disabled
Fall 2010
ECE Digital System Design

25. ECE 331 - Digital System Design
Decoder with Enable
Enable B W X Y Z I0 I1 A
Out0
Out1
Out2
Out3 En
low-level
enable En A B W X Y Z 1 x
enabled
disabled
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ECE Digital System Design

26. 2-to-4 Decoder with Enable in VHDL
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ECE Digital System Design

27. Exercise: Design a 4-to-16 decoder using 2-to-4 decoders only.
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ECE Digital System Design

28. ECE 331 - Digital System Design
Encoders
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ECE Digital System Design

29. ECE 331 - Digital System Design
Encoders
An encoder has
2N inputs
N outputs
An encoder outputs the binary value of the selected (or active) input.
An encoder performs the inverse operation of a decoder.
Issues
What if more than one input is active?
What if no inputs are active?
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ECE Digital System Design

30. ECE 331 - Digital System Design
Encoders D I0 C Z I1
Out0
Out1 Y B I2 A I3 A B C D Y Z 1
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ECE Digital System Design

31. ECE 331 - Digital System Design
Priority Encoders
If more than one input is active, the higher-order input has priority over the lower-order input.
The higher value is encoded on the output
A valid indicator, d, is included to indicate whether or not the output is valid.
Output is invalid when no inputs are active
d = 0
Output is valid when at least one input is active
d = 1
Why is the valid indicator needed?
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ECE Digital System Design

32. ECE 331 - Digital System Design
Priority Encoders
msb
Valid bit
Fall 2010
ECE Digital System Design

33. VHDL: 4-to-2 Priority Encoder
LIBRARY ieee ;
USE ieee.std_logic_1164.all ;
ENTITY priority IS
PORT ( w : IN STD_LOGIC_VECTOR(3 DOWNTO 0) ;
y : OUT STD_LOGIC_VECTOR(1 DOWNTO 0) ;
z : OUT STD_LOGIC ) ;
END priority ;
ARCHITECTURE Behavior OF priority IS
BEGIN
y <= "11" WHEN w(3) = '1' ELSE
"10" WHEN w(2) = '1' ELSE
"01" WHEN w(1) = '1' ELSE
"00" ;
z <= '0' WHEN w = "0000" ELSE '1' ;
END Behavior ;
4 input bits
valid indicator
2 output bits
Active-high
inputs and outputs

34. Designing logic circuits using multiplexers
Fall 2010
ECE Digital System Design

35. Using an n-input Multiplexer
Use an n-input multiplexer to realize a logic circuit for a function with n minterms.
m = 2n, where m = # of variables in the function
Each minterm of the function can be mapped to an input of the multiplexer.
For each row in the truth table, for the function, where the output is 1, set the corresponding input of the multiplexer to 1.
That is, for each minterm in the minterm expansion of the function, set the corresponding input of the multiplexer to 1.
Set the remaining inputs of the multiplexer to 0.
Fall 2010
ECE Digital System Design

36. ECE 331 - Digital System Design
Using an n-input Mux
Example:
Using an 8-to-1 multiplexer, design a logic circuit to realize the following Boolean function
F(A,B,C) = Sm(2, 3, 5, 6, 7)
Fall 2010
ECE Digital System Design

37. ECE 331 - Digital System Design
Using an n-input Mux
Example:
Using an 8-to-1 multiplexer, design a logic circuit to realize the following Boolean function
F(A,B,C) = Sm(1, 2, 4)
Fall 2010
ECE Digital System Design

38. Using an (n / 2)-input Multiplexer
Use an (n / 2)-input multiplexer to realize a logic circuit for a function with n minterms.
m = 2n, where m = # of variables in the function
Group the rows of the truth table, for the function, into (n / 2) pairs of rows.
Each pair of rows represents a product term of (m – 1) variables.
Each pair of rows can be mapped to a multiplexer input.
Determine the logical function of each pair of rows in terms of the mth variable.
If the mth variable, for example, is x, then the possible values are x, x', 0, and 1.
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39. Using an (n / 2)-input Mux
Example: F(x,y,z) = Sm(1, 2, 6, 7)
Fall 2010
ECE Digital System Design

40. Using an (n / 2)-input Mux
Example: F(A,B,C,D) = Sm(1,3,4,11,12–15)
Fall 2010
ECE Digital System Design

41. Using an (n / 4)-input Mux
The design of a logic circuit using an (n / 2)-input multiplexer can be easily extended to the use of an (n / 4)-input multiplexer.
Fall 2010
ECE Digital System Design

42. Designing logic circuits using decoders
Fall 2010
ECE Digital System Design

43. Using an n-output Decoder
Use an n-output decoder to realize a logic circuit for a function with n minterms.
Each minterm of the function can be mapped to an output of the decoder.
For each row in the truth table, for the function, where the output is 1, sum (or “OR”) the corresponding outputs of the decoder.
That is, for each minterm in the minterm expansion of the function, OR the corresponding outputs of the decoder.
Leave remaining outputs of the decoder unconnected.
Fall 2010
ECE Digital System Design

44. Using an n-output Decoder
Example:
Using a 3-to-8 decoder, design a logic circuit to realize the following Boolean function
F(A,B,C) = Sm(2, 3, 5, 6, 7)
Fall 2010
ECE Digital System Design

45. Using an n-output Decoder
Example:
Using two 2-to-4 decoders, design a logic circuit to realize the following Boolean function
F(A,B,C) = Sm(0, 1, 4, 6, 7)
Fall 2010
ECE Digital System Design

46. ECE 331 - Digital System Design
Questions?
Fall 2010
ECE Digital System Design