1. PLAs Programmable Logic Arrays
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2. PLAs Objectives Explain the operation of a PLA
Use a PLA to implement a logic network
Given a PLA design, determine the logic functions implemented
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3. Programmable Logic Array (PLA)
n Input Lines .
AND
Array OR
Array .
...
k Word Lines
m Outputs Lines
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4. PLA AND-OR Equivalent OR AND Array Array F1 = AB’+ C F2 = A’C’ + BC
F3 = AB’ + A’C’
F4 = A’C’ + BC + AB’C
Note: Not every minterm is
available
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5. PLA Table Generation F1 = AB’+ C F2 = A’C’ + BC F3 = AB’ + A’C’
F4 = A’C’ + BC + AB’C
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6. Internal PLA Structure
Inputs
Outputs
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7. Internal PLA Structure
Inputs
The AND plane lines get pulled up to +V
Outputs
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8. Internal PLA Structure
Inputs
The AND plane lines stay at +V unless one
of the connected inputs pulls it low.
Outputs
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9. Internal PLA Structure
Inputs 1
The AND plane lines stay at +V unless one
of the connected inputs pulls it low.
Outputs
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10. Internal PLA Structure
Inputs
The OR plane lines get pulled down to Ground
Outputs
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11. Internal PLA Structure
Inputs
The OR plane lines get pulled down to Ground
Outputs
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12. Internal PLA Structure
Inputs
The OR plane lines stay at GND unless one
of the AND plane lines pulls it high.
Outputs
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13. Internal PLA Structure
Inputs
The OR plane lines stay at GND unless one
of the AND plane lines pulls it high.
Outputs
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14. Internal PLA Structure
Inputs
The OR plane lines stay at GND unless one
of the AND plane lines pulls it high.
Outputs
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15. Internal PLA Structure
Inputs
The OR plane lines stay at GND unless one
of the AND plane lines pulls it high.
Outputs
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16. Another PLA Representation
Inputs
Outputs
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17. Programmable Logic Array (PLA)
All inputs and inverted inputs available
Limited number of AND functions
This is the biggest difference between a ROM and a PLA
Complete choice of inputs and inverted inputs for each AND function
OR function for each output
Complete choice of AND functions for each OR function (output)
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18. Implement these equations: X = ABC + B’D’ + AB’D + C’D’ Y = BC + D’
PLA Example
Implement these equations:
X = ABC + B’D’ + AB’D + C’D’
Y = BC + D’
Z = CD + B’D’ + A’BC
in this PLA:
8 terms 1 2 3 4 5 6 7 8
6 terms or AND
plane lines
How can we implement 8 product terms with 6 AND plane lines?
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19. PLA Example Implement these equations: X = ABC + B’D’ + AB’D + C’D’
Y = BC + D’
Z = CD + B’D’ + A’BC
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20. PLA Example Implement these equations: X = ABC + B’D’ + AB’D + C’D’
Y = BC + D’
Z = CD + B’D’ + A’BC
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21. PLA Example Implement these equations: X = ABC + B’D’ + AB’D + C’D’
Y = BC + D’
Z = CD + B’D’ + A’BC
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22. PLA Example Implement these equations: X = ABC + B’D’ + AB’D + C’D’
Y = BC + D’
Z = CD + B’D’ + A’BC
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23. PLA Example
C’D’ is in X and Y and looks useful
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24. PLA Example C’D’ is in X and Y and looks useful
B’D’ is in all three functions
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25. PLA Example C’D’ is in X and Y and looks useful
B’D’ is in all three functions
A’BC and ABC cover a lot of minterms
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26. PLA Example C’D’ is in X and Y and looks useful
B’D’ is in all three functions
A’BC and ABC cover a lot of minterms
The only ones left are AB’ and CD
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27. PLA Example X = C’D’ + B’D’ + AB’ + ABC Y = C’D’ + B’D’ + ABC + A’BC
Z = B’D’ + CD + A’BC
All of the functions are covered using only 6 product terms
How is this possible?
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28. PLA Example X = C’D’ + B’D’ + AB’ + ABC Y = C’D’ + B’D’ + ABC + A’BC
Z = B’D’ + CD + A’BC
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29. PLA Example X = C’D’ + B’D’ + AB’ + ABC Y = C’D’ + B’D’ + ABC + A’BC
Z = B’D’ + CD + A’BC
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30. PLA Example X = C’D’ + B’D’ + AB’ + ABC Y = C’D’ + B’D’ + ABC + A’BC
Z = B’D’ + CD + A’BC
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31. PLA Example X = C’D’ + B’D’ + AB’ + ABC
Y = C’D’ + B’D’ + ABC + A’BC Z = B’D’ + CD + A’BC
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32. Summary Explain the operation of a ROM
Use a ROM to implement a logic network
Explain the operation of a PLA
Use a PLA to implement a logic network
Given a PLA design, determine the logic functions implemented
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