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ICS 252 Introduction to Computer Design Multi-level Logic Optimization Fall 2006 Eli Bozorgzadeh Computer Science Department-UCI.

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Presentation on theme: "ICS 252 Introduction to Computer Design Multi-level Logic Optimization Fall 2006 Eli Bozorgzadeh Computer Science Department-UCI."— Presentation transcript:

1 ICS 252 Introduction to Computer Design Multi-level Logic Optimization Fall 2006 Eli Bozorgzadeh Computer Science Department-UCI

2 2 Fall 2007ICS 252-Intro to Computer Design Multi-level logic optimization Representation Optimization –Goal: area/delay –Algorithmic: algebraic, Boolean –Rule-based methods Examples of transformations

3 3 Fall 2007ICS 252-Intro to Computer Design Motivation Multiple-level networks: –Semi-custom libraries. –Gates versus macros (PLAs): – More flexibility. – Better performance. – Applicable to a variety of designs. ©GDM

4 4 Fall 2007ICS 252-Intro to Computer Design Circuit Modeling Logic network: –Interconnection of logic functions. –Hybrid structural/behavioral model. Bound (mapped) networks: –Interconnection of logic gates. –Structural model. ©GDM

5 5 Fall 2007ICS 252-Intro to Computer Design Multi-level vs. Two-level PLA –Control logic –Constrained layout –Highly automatic –Technology independent –Slower –Multi valued function –Input,output, state encoding Multi-level –All logic –General –Automatic –Partially tech dependent –Can be faster

6 6 Fall 2007ICS 252-Intro to Computer Design Example of bound network a b c x y va vb vc vp vq vx vy p q ©GDM

7 7 Fall 2007ICS 252-Intro to Computer Design Example of network ©GDM

8 8 Fall 2007ICS 252-Intro to Computer Design Example of network a b c d e v=a’d+bd+c’d+ae’ p=ce+de r=p+a’ s=r+b’ t=ac+bd+bc+bd+e q=a+b u=q’c+qc’+qc w x y z ©GDM

9 9 Fall 2007ICS 252-Intro to Computer Design Network optimization Minimize area (power) –Subject to delay constraint Minimize maximum delay –Subject to area (power) constraint Minimize power consumption –Subject to delay constraint Maximize testability ©GDM

10 10 Fall 2007ICS 252-Intro to Computer Design Estimation Area: –Number of literals –Number of functions/gates Delay –Number of stages –Refined gate delay models –paths ©GDM

11 11 Fall 2007ICS 252-Intro to Computer Design Problem analysis Multi-level optimization is hard Exact models –Exponential complexity –Impractical Approximate methods –Heuristics algorithms –Rule-based methods ©GDM

12 12 Fall 2007ICS 252-Intro to Computer Design Strategies for optimization Improve circuit step by step –Circuit transformation Preserve network behavior Methods differ in –Types of transformations –Selection and order of transformations ©GDM

13 13 Fall 2007ICS 252-Intro to Computer Design Eliminate Eliminate one function from the network Perform variable substitution Example: –s = r + b’; r = p + a’; –s = p + a’ + b’; ©GDM

14 14 Fall 2007ICS 252-Intro to Computer Design Example a b c d e v=a’d+bd+c’d+ae’ p=ce+de s=p+a’+b’ t=ac+bd+bc+bd+e q=a+b u=q’c+qc’+qc w x y z ©GDM

15 15 Fall 2007ICS 252-Intro to Computer Design decomposition Break one function into smaller ones Introduce new vertices in the network Example ©GDM

16 16 Fall 2007ICS 252-Intro to Computer Design Example a b c d e V=jd+ae’ p=ce+de r=p+a’ s=r+b’ t=ac+bd+bc+bd+e q=a+b u=q’c+qc’+qc w x y z v=a’+b+c’ ©GDM

17 17 Fall 2007ICS 252-Intro to Computer Design Example extraction Find a common sub-expression of two or more expressions Extract sub-expression as new function Introduce new vertex in the network Example ©GDM

18 18 Fall 2007ICS 252-Intro to Computer Design Example a b c d e v=a’d+bd+c’d+ae’ p=ke r=p+a’ s=r+b’ t=ka+kb+e q=a+b u=q’c+qc’+qc w x y z K=c+d ©GDM

19 19 Fall 2007ICS 252-Intro to Computer Design Simplification Simplify a local function Example ©GDM

20 20 Fall 2007ICS 252-Intro to Computer Design Example a b c d e v=a’d+bd+c’d+ae’ p=ce+de r=p+a’ s=r+b’ t=ac+bd+bc+bd+e q=a+b u=q+c w x y z ©GDM

21 21 Fall 2007ICS 252-Intro to Computer Design substitution Simplify a local function by using an additional input that was not previously in its support set. Example ©GDM

22 22 Fall 2007ICS 252-Intro to Computer Design Example a b c d e v=a’d+bd+c’d+ae’ p=ke r=p+a’ s=r+b’ t=ka+kb+e q=a+b u=q’c+qc’+qc w x y z K=c+d ©GDM

23 23 Fall 2007ICS 252-Intro to Computer Design Example a b c d e v=a’d+bd+c’d+ae’ p=ke r=p+a’ s=r+b’ t=kq+e q=a+b u=q’c+qc’+qc w x y z K=c+d ©GDM

24 24 Fall 2007ICS 252-Intro to Computer Design Optimization approaches Algorithmic approach –Define an algorithm for each transformation –Algorithm is an operator on the network Rule-based approach –Rule-data base Set of pattern pairs –Pattern replacement by rules ©GDM

25 25 Fall 2007ICS 252-Intro to Computer Design Algorithmic approach Each operator has well-defined properties –Heuristic methods –Weak optimality Sequence of operators –Defined by scripts in SIS –Based on experience ©GDM

26 26 Fall 2007ICS 252-Intro to Computer Design Example of script in SIS sweep; eliminate -1 simplify –m nocomp eliminate -1 sweep; eliminate 5 simplify –m nocomp resub –a fx resub –a;sweep… ©GDM

27 27 Fall 2007ICS 252-Intro to Computer Design Boolean and algebraic methods Boolean methods –Exploit properties of logic functions –Use don’t care conditions –Complex Algebraic methods –View functions as polynomials –Exploit properties of polynomial algebra –Simpler, faster but weaker ©GDM

28 28 Fall 2007ICS 252-Intro to Computer Design summary Multilevel logic synthesis is performed by step-wise transformations Algorithms are based on both the Boolean and the algebraic models Rule-based ©GDM

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