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Integrating Hardware Experiences into a Computer Architecture Core Course Fred Martin Computer Science University of Massachusetts Lowell.

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Presentation on theme: "Integrating Hardware Experiences into a Computer Architecture Core Course Fred Martin Computer Science University of Massachusetts Lowell."— Presentation transcript:

1 Integrating Hardware Experiences into a Computer Architecture Core Course Fred Martin Computer Science University of Massachusetts Lowell

2 Motivations  Simulation is important  Simulation lets you build more complex designs in limited time, but  simulation-only is not fun  interesting problems are at the edges  Understanding low-level provides basis for understanding higher abstractions

3 More Motivations  I like hardware  Hardware is fun  Hardware plus software is really fun  Everyone should get to play with hardware at least once  I need students who can do hardware

4 Context  UML-CS dept has history of doing hardware  UML has an ECE dept, but we’re separate  CS has 3-semester Logic Design, Org, Arch sequence  When I joined dept in 2002 there was no core hardware experience for majors

5 Constraints  No dedicated lab space  Can not add lab units to course  Some money but not lots ($50/kit x 35 students)  Can’t extract lab-kit money from students

6 Solution  Nearly all students have computers; let’s use them  Can also use our computer labs  Give them everything they need to build (and hopefully debug) logic + embedded CPU designs  Answer: A take-home lab kit!

7 Custom “UML 305DEV” Board +5v supply serial out serial in 8 LED inputs 8 switch ins piezo logic probe gnd Parts + Board: $25 RS-232 to TTL level shifter

8 Rest of the Kit

9 Course Design WeekTopicsAssignments 1–2 Digital logic, 74xx Mystery chips 2–3 State machines Make robot follow line 4 ISA of 68HC11 CPU Boot your HC11 5 Timing & cycle count Make particular beeps 6 Mem mapped I/O Address decoding 7, 8 x86 ISA “Bomblab” 9, 10 6-state execution “Archlab A + B” 11, 12 Pipelining “Archlab C” 13, 14 Cache memory “Perflab” hardwaresimulation real SW

10 Digital Logic Lab  Build oscillator, counter/divider, view signals  Mystery chips: you are given one 14-pin and one 16-pin DIP. Figure out which member of the 74HCxx series it is!  A review of digital logic topics, but with more emphasis on understanding signals, including high impedance state.

11 State Machine Lab  Implement state machine with register, logic equations, minimization  Actually implement with latch chips  Program a LEGO robot to follow a line with a 4-state, 1- sensor solution

12 HC11 Boot Lab  Install and configure tools on your PC (Java source provided)  Get HC11 to load 3-line program and light an LED  Introduce addressing modes, memory map, bootloader  Relatively little wiring needed

13 Why 68HC11?  Simple, 8-bit processor with standard von Neumann architecture  16-bit external memory interface  Serial boot mode  Available in DIP package  I know it well

14 HC11 Beep Lab  Generate particular tones on HC11 output pin; listen to them with piezo  Doubly-nested delay loops  Many levels of time: usec instruction clock, millisec half-wave delay, audio frequencies  Introduced scopes when later had a lab  Timing stuff is particularly valuable and new to students

15 HC11 Address Decoding  Build combo logic to decode 4 bits of addr and allow HC11 to write to a latch  Test design by running provided code and seeing bit flash pattern on latch outputs  Also do paper design of RAM addressing  Advanced for most students: hard to debug, possible for wrong designs to work

16 Rest of Course: CS/APP  Switched text to Bryant/O’Hallaron’s Computer Systems: A Programmer’s Perspective (2003)  ORG: by decompiling Linux executables— “Binary Bomb Lab”  ARCH: based on “Y86” pedagogical processor simulator  Cache treatment with “Perflab”—improve stride in 2D image processing app

17 Discussion & Conclusions  Review/revisiting with a fresh perspective is good  Basic design (take-home kits + labs themselves) is sound  Labs are fairly modular and could be adopted by others  Later revs of class left out Logic Lab (made room for Perf Lab)

18 More Discussion  Some students like it a lot; others are annoyed  I repeatedly refer back to HW labs in core arch material  Would love to do arch material with FPGA implementations  Best measure of success: students recruited to my research lab, and those graduated in HW-oriented industry jobs

19 Final Pitch  Have successfully handed off course to dept colleague  I am happy to give away all course material for academic use, including:  PCB artwork for “305DEV” board  Parts lists  Java-based HC11 tools  Labs  Exams  Please contact me if you are interested! fredm@cs.uml.edu


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