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Sequential Redundancy Removal w/o State Space Exploration A. Mehrotra, S. Qadeer, V. Singhal, R. Brayton, A. Aziz, A. Sangiovanni-Vincentelli, “Sequential.

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Presentation on theme: "Sequential Redundancy Removal w/o State Space Exploration A. Mehrotra, S. Qadeer, V. Singhal, R. Brayton, A. Aziz, A. Sangiovanni-Vincentelli, “Sequential."— Presentation transcript:

1 Sequential Redundancy Removal w/o State Space Exploration A. Mehrotra, S. Qadeer, V. Singhal, R. Brayton, A. Aziz, A. Sangiovanni-Vincentelli, “Sequential Optimization Without State Space Exploration” ICCAD 97, November 1997 M. Iyer, D. Long and M. Abramovici, “Identifying Sequential Redundancies without Search”, DAC June 1996

2 Outline Compatible Redundancies –Combinational –Sequential Results

3 incompatible redundancies n1 n2 out n similarly for n1 (s-a-1 redundant) but setting them both to 1 at the same time gives wrong circuit n1=0n2=* n1=1n2=1 n2 is s-a-1 redundant (* means unobservable) Generally, we know that we can find a number of redundancies at once, but setting any one of them to their constant may invalidate the other redundancies. Like don’t cares. They need to be compatible if they are to be used simultaneoously.

4 Recursive learning b a b1 b2 a1 a2 d c f e g a=0  f=0 d=0  f = 0 a=1  a1=1 d=1  f = * f is s-a-0 redundant recursive learning

5 Initial state? We will not use an initial state Instead we use concept of c-cycle redundancy –after c cycles of clocking, old and new machines have same I/O behavior –use concept of safe-delayed replacement which preserves concept of initializing sequences. Definition: An assumption A on a set of signals P is a labeling from {0,1} on P

6 Implications b  b’ b’  b 1 1 1 0 0 0 0 1 1 1 1 0 (1) 0 * * * * * * Observability AND / INV Note: a * can only imply a *

7 Incompatible redundancies c d e ba 1 1 1 10 * * 0 01 Obviously wrong because of overwriting When is overwriting legitimate? 1.could use rule to never overwrite 2.but then conservative 0 * * 0

8 However! New rule: can overwrite a 0 or 1 with a *, but never overwrite a * with a 0 or 1 a b a1 a2 d c e 1010 1010 0101 0 1*1*1*01*0 * implies that a2 s-a-0 redundant (a=1 implications above the lines and a=0 implications below the lines)

9 Combinational Algorithm redundancy_remove(G = (V,E)) while (there is unvisited n) { S1 = learn_implications(n = 1) S0 = learn_implications(n = 0) For every implication (l = v) in R {set l = constant v} propagate constants simplify network } v in {0,1} This requires the set of redundancies R is compatible

10 Combinational Algorithm learn_implications( G = (V,E), A) forall (n = v in A) {label n  v } { while (some rule can be invoked) { let (n = b) be the new implication from rule if (b = *) label n  b ; continue if (b conflicts with a current label) return { l = * | l in E} // assumption A was inconsistent else n  b (I think we need to make sure a current label is not *) } return set of all current labels } A conflict is if the label is both 0 and 1.

11 Rules and properties At all times a net has a unique label A 0 or 1 can be overwritten by a * But a * is not allowed to be overwritten by a 0 or 1 Set R is a set of compatible redundancies

12 Key concept to prove that set of redundancies returned is compatible Implication Graph Vertices are labeled with (n = r) for some net n and r in {0,1,*} Root vertices labeled with (m=a) in A There is exactly on leaf vertex For non-root node its label can be obtained from the labeling of its parents by using one of the rules of inference.

13 Example - implication graph n1 n2 n3n4 n5 n6 n7 n8 n9 n8=1n2=1n1=1 n6=1n5=0n3=0n4=1n7=1n9=1

14 Key Lemma Lemma: Let A be consistent. If a label (m = a) is overwritten by the label (m = *) in the current set of labels, then for all labels (n j = b j ), there is an implication graph such that (m = a) is not a label of any vertex in the graph Proof: it is proved that if a constant label is overwritten with a *, then every other label must have an implication graph which does not depend on the overwritten label.

15 Proof. Suppose m = a was first instance of overwritten by a * and let n j = b j be an implication that uses m=a: n 1 =b 1  n 2 =b 2  …  m=a  …  n j =b j but does not have a valid implementation graph now. i th Case 1: 2: 3: Case1. assume b j a constant. Then all b k are constants since a * can only imply a *. OR nini n i-1 nknk * 0 nini nknk ** nini nknk 1 1 nini nknk 0 0 1 1 nini nknk nini nknk nknk nini

16 Theorems Let A be consistent. Then the set of labels returned by the algorithm is compatible. Let n i s-a-v i redundant for all be the set of redundant faults reported by the algorithm. Then the circuit obtained by setting n i = v i for all is combinationally equivalent to the original.

17 Sequential Redundancies We will use the notion of c-cycle replacement, which says that we are willing to wait c cycles after power-up to start getting the correct results Every signal will have a superscript which gives a time frame relative to a generic one t, e.g. d t, d t+1, d t-2 Rules of implication are the same except when the implication is across a latch, the superscript is adjusted accordingly.

18 Example d e f i a y g c b a t =0e t =0c t+1 =0 d t =0b t+1 =0g t+1 =0a t+1 =0e t+1 =0c t+2 =0 a t =1e t =1c t+1 =1 d t =1b t+1 =1g t+1 =1a t+1 =0e t+1 =0c t+2 =0 Might conclude that c=0 is a 2- cycle redundancy. But WRONG. If we were to replace c by 0, and the new circuit powers-up in state 1 1, then it would produce x = 1 all the time. However old circuit produces x = 0 for t > 0. Problem is that needed c=1 was needed when a=1 was used to imply c=0

19 New Rule Insure that no net is labeled with different values at different times. Algorithm labels a net n with at most one value. If a net is labeled then we store a list of time offsets for when this label is valid. a t =1e t =1c t+1 =1 d t =1b t+1 =1g t+1 =1a t+1 =0e t+1 =0c t+2 =0

20 c-cycle redundncy Definition: Suppose we conclude that n is s-a-v redundant at time t’ let t” be the least time offset in the implication graphs for n s-a-v such that some net m, m t’’ is labeled with a constant then we say that n is c-cycle s-a-v redundancy where

21 Lemma [1] Let a net be c-cycle s-a-v redundant. Then the circuit obtained by setting net n = v results in a c-delayed safe replacement of the original circuit. [1] M. Iyer, D. Long and M. Abramovici, “Identifying Sequential Redundancies without Search”, DAC 1996

22 Lemmas Let A be a consistent assumption. If a label n t = a is replaced with n t = * in the current set of labels, then for all labels n t’ j = b j, there is an implication graph such that n t = a is not a label in the graph. Let A be a consistent assumption. Then the set of labels returned by the algorithm is compatible.

23 Theorem Let n i be c i -cycle s-a-v i redundant for all and. Then, the circuit obtained by setting the n i = v i for all i is an N-delay safe replacement of the original circuit.

24 Results: Application to sequential circuits - Table 2 Compare to next table to see how much Sequential redundancy removal can to over combinational * full_simplify not run red = # redundancies removed L = # latches, LR1, LR2 = # latches removed A = mapped area after script.rugged, A1, A2 = mapped area after red. removals C = c-cycle replacement (upper bound) 10636

25 Results: Application to combinational circuits 10636 Combinational redundancy removal only

26 Question We saw that –Unroll the circuit n time frames –Assume that the present state lines in the first time frame are fully controllable –Assume that the next state lines in the last time frame are fully observable. –Use combinational test pattern generator –Two different procedures 1.Fault occurs only in the last time frame 2.Fault occurs in all time frames –In either case, lack of combinational test implies that fault is sequentially undetectable What can we say about c-cycle redundancy?

27 Questions How much did compatibility help in speeding up redundancy removal? –Seems like we can get the same set of redundancies without using compatibility. Can we combine unrolling and compatible redundancies to get a more powerful method? –i.e. unroll and then reconnect registers after n time frames. Then detect and remove sequential redundancies. Using the similarity with CODCs, can we extend the compatible redundancies to get a more powerful method?


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