1. COE 308: Computer Architecture (T041) Dr. Marwan Abu-Amara Integer & Floating-Point Arithmetic (Appendix A, Computer Architecture: A Quantitative Approach, J. Hennessy & D. Patterson, 1 st Edition, 1990)

2. COE 308 (T041) – Dr. Marwan Abu-Amara 2 Basic Techniques of Integer Arithmetic Ripple-Carry Addition:  Half Adder: Takes 2 inputs a i & b i and produces a sum bit, s i, and a carry bit, c i+1, as output Mathematicallys i = (a i + b i ) mod 2 c i+1 =  (a i + b i ) / 2  Logically c i+1 = a i b i

3. COE 308 (T041) – Dr. Marwan Abu-Amara 3 Basic Techniques of Integer Arithmetic (cont.) Ripple-Carry Addition:  Full Adder: Takes 3 inputs a i, b i, & c i and produces a sum bit, s i, and a carry bit, c i+1, as output Logically c i+1 = a i b i + a i c i + b i c i  Problem in building an n-bit adder is propagating the carries  Ripple-carry adder uses n full adders to build an n-bit adder  Delay of c i+1 is 2 levels of logic  2n logic levels in an n-bit adder (i.e. O(n) to generate final result)  Can use n-bit adder to get A–B by feeding A into “A” input & inverse of B into “B” input, and set c 0 to 1

4. COE 308 (T041) – Dr. Marwan Abu-Amara 4 Basic Techniques of Integer Arithmetic (cont.)

5. COE 308 (T041) – Dr. Marwan Abu-Amara 5 Radix-2 Multiplication & Division Multiplication: 2 unsigned numbers, A & B (a n-1 a n-2 … a 1 a 0 & b n-1 b n-2 … b 1 b 0 ). Register P (i.e. product) is initially set to 0. Algorithm: Repeat n times 1. If least significant bit of A is 1  P = P + B Otherwise  P = P + 0 2. Shift the register pair P & A to right by 1 bit such that low- order bit of P is moved into A’s high-order bit, and low-order bit of A is shifted out  Final result is in the register pair P & A with P having the high order bits

6. COE 308 (T041) – Dr. Marwan Abu-Amara 6 Radix-2 Multiplication & Division “Restoring” Division: 2 unsigned numbers, A & B (a n-1 a n-2 … a 1 a 0 & b n-1 b n-2 … b 1 b 0 ). Register P is initially set to 0. Algorithm: Repeat n times 1. Shift register pair P & A one bit left (with high-order bit of A moved into P’s low-order bit) 2. Subtract B from P (i.e. P = P – B) 3. If result of step 2 < 0 (i.e. (–)ve)  Set low-order bit of A to 0 Otherwise  Set low-order bit of A to 1 4. If result of step 2 < 0 (i.e. (–)ve)  P = P + B  Final result: A = quotient, P = remainder

7. COE 308 (T041) – Dr. Marwan Abu-Amara 7 Radix-2 Multiplication & Division

8. COE 308 (T041) – Dr. Marwan Abu-Amara 8 Example of Division Divide 14 by 3  A = 14 = 1110 2 & B = 3 = 0011 2 Iteration Step P A Iteration Step P A. Initial. 0 0000 1110 11 0 0001 110_ 4 1 0 0010 010_ 2 -0 0011 3 -0 0010 1100 3 -0 0001 0100 (add B to P)4 0 0001 1100 (add B to P) 4 0 0010 0100 21 0 0011 100_ 2 -0 0011  Quotient = A = 0100 2 3 0 0000 1001 = 4 4 0 0000 1001Remainder = P = 0010 2 31 0 0001 001_ = 2 2 -0 0011 3 -0 0010 0010 (add B to P)4 0 0001 0010

9. COE 308 (T041) – Dr. Marwan Abu-Amara 9 Radix-2 Multiplication & Division Non-Restoring Division: 2 unsigned numbers, A & B (a n-1 a n-2 … a 1 a 0 & b n-1 b n-2 … b 1 b 0 ). Register P is initially set to 0. Algorithm: Repeat n times If P is (–)ve: 1. Shift register pair P & A one bit left 2. P = P + B Else (i.e. If P is not (–)ve): 1. Shift register pair P & A one bit left 2. P = P – B If P is (–)ve  Set low-order bit of A to 0 Otherwise  Set low-order bit of A to 1  Final result: A = quotient, P = remainder

10. COE 308 (T041) – Dr. Marwan Abu-Amara 10 Signed Numbers 4 methods: 1. Sign magnitude 2. 1’s complement 3. 2’s complement(most widely used) 4. Biased: A fixed bias is picked so that sum of bias & # represented is always > 0 (used in floating-point) Example: Represent –3 in (1) sign magnitude, (2) 1’s complement, (3) 2’s complement 3 = 0011 2  (1) sign magnitude: – 0011 2 = 1011 2  (2) 1’s complement:1100 2  (3) 2’s complement:1101 2

11. COE 308 (T041) – Dr. Marwan Abu-Amara 11 Signed Numbers (cont.) Overflow in unsigned #s: when there’s a carry-out of MSB Overflow in 2’s complement: when carry-in to MSB is different from carry-out of MSB Example: –5 + (–7)  10  different 1011(–5)  overflow +1001 (–7) 0100 5 + (–7)  00  same 0101(+5)  no overflow +1001 (–7) 1110

12. COE 308 (T041) – Dr. Marwan Abu-Amara 12 Radix-2 Multiplication & Division Signed Numbers Multiplication: To perform 2’s complement multiplication, use same algorithm as before but with the following modifications: 1. At the i th multiply step, LSB of A is a i, and: for 1 st step (i.e. when i = 0), take a i-1 to be 0 2. Shift P arithmetically (i.e. copy sign bit) 1 bit to right If a i =& a i-1 =then 00Add 0 to P 01Add B to P 10Sub B from P 11Add 0 to P

13. COE 308 (T041) – Dr. Marwan Abu-Amara 13 Example 1 of Multiplication Multiply -6 by -5  A = -6 = a 3 a 2 a 1 a 0 = 1010 2 & B = -5 = 1011 2 Iteration Step P A a i-1 0000 1010 0 +01 +0000 0 0000 1010 2 0000 0101 0 -B1 +0101 1 0101 0101 2 0010 1010 1 +B1 +1011 2 1101 1010 2 1110 1101 0 -B1 +0101 3 0011 1101 2 0001 1110 1  Product = P & A = +30

14. COE 308 (T041) – Dr. Marwan Abu-Amara 14 Example 2 of Multiplication Multiply -6 by +5  A = -6 = a 3 a 2 a 1 a 0 = 1010 2 & B = +5 = 0101 2 Iteration Step P A a i-1 0000 1010 0 +01 +0000 0 0000 1010 2 0000 0101 0 -B1 +1011 1 1011 0101 2 1101 1010 1 +B1 +0101 2 0010 1010 2 0001 0101 0 -B1 +1011 3 1100 0101 2 1110 0010 1  Product = P & A = -30

15. COE 308 (T041) – Dr. Marwan Abu-Amara 15 Floating Point A floating-point number (FP #) is divided into 2 parts: 1. Exponent 2. Significand (or Mantissa) FP # = significand  base exponent (e.g. exponent = -2 & significand = 1.5  FP # = 1.5  2 -2 = 0.375) Single-precision # is represented using 32 bits: 1 for sign 8 for exponent 23 for fraction Exponent is a signed # represented using the bias method with a bias of 127 Significand = Mantissa = 1 + fraction Thus, if e = value of exponent field, and f = value of fraction field, then FP # represented is 1.f  2 e–127

16. COE 308 (T041) – Dr. Marwan Abu-Amara 16 Floating Point (cont.) Example: What single-precision FP # does the following 32-bit word represent? 1100000010100…00 1 10000001 0100…00  sign = 1 = –ve exponent field = e = 10000001 2 = 129 (  exponent = 129–127 = 2) fraction field = f =.0100…00 2 = 0.01 2 = 0.25  FP # = –1.f  2 e–127 = –1.25  2 129–127 = –1.25  4 = –5 Range of exponent field (i.e. e) is from 1 to 254 (i.e. exponent is from –126 to 127)  e = 0 or 255 are used to represent special values

17. COE 308 (T041) – Dr. Marwan Abu-Amara 17 Floating Point (cont.) efFP # RepresentedComment 255= 0  255  0 NaNNot a Number 0= 00 0  0 denormal # (or subnormal #) Deals with very small values

18. COE 308 (T041) – Dr. Marwan Abu-Amara 18 Floating Point Addition What is the sum of 1,234,823.333 &.0011?  Need to line up the decimal points first  This is the same as shifting the significand while changing the exponents 1,234,823.333 = 1.234823333  10 6.0011 = 1.1  10 -3 = 0.0000000011  10 6  Add significands (using integer addition) Significand sum= 1.234823333 + 0.0000000011 = 1.2348233341  Normalize the result, if needed Result = 1.2348233341  10 6

19. COE 308 (T041) – Dr. Marwan Abu-Amara 19 Floating Point Addition (cont.) Binary FP Addition Algorithm:  Similar to decimal FP addition method  Let e i = exponent, s i = significand (i.e. 1 + f i = 24 bits), then steps of algorithm are: 1. If e 1 < e 2, swap the operands, calculate d = e 1 – e 2 (note that d  0), and set exponent of result to e 1 2. Shift s 2 by d places to the right 3. Add s 1 & result of step 2, and store result in s 1 4. Normalize:  If result of step 3 (i.e. s 1 )  2  Shift s 1 by 1 place right & add 1 to exponent  If s 1 < 1  Shift s 1 to left until leftmost binary digit is 1 & subtract # of shifts from exponent  If s 1 = 0  Load special zero pattern into exponent  Otherwise, do nothing (i.e. done)