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Logic Verification 2 Outline –Ordered Binary Decision Diagrams –Verification using OBDDs –OBDD Data Structures –OBDD Operations –Verification Example Goal.

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Presentation on theme: "Logic Verification 2 Outline –Ordered Binary Decision Diagrams –Verification using OBDDs –OBDD Data Structures –OBDD Operations –Verification Example Goal."— Presentation transcript:

1 Logic Verification 2 Outline –Ordered Binary Decision Diagrams –Verification using OBDDs –OBDD Data Structures –OBDD Operations –Verification Example Goal –Understand OBDDs –Understand OBDD data structures –Understand OBDD algorithms Reading –Logic Synthesis and Verification Algorithms, Hachtel and Somenzi, Ch. 6

2 Ordered Binary Decision Diagrams Graphical representation of boolean functions –rooted, directed graph with vertex set V Nonterminal vertex v –attributes are index, low, high –index(v)  { 1,..., n } –children low(v), high(v)  V –if low(v) is nonterminal, index(v) < index(low(v)) –if high(v) is nonterminal, index(v) < index(high(v)) Terminal vertex v –attribute value(v)  { 0, 1 }

3 Function Graph Function graph G having root v denotes function f v Recursive Definition –if v is a terminal vertex »if value(v) = 1, then f v = 1 »if value(v) = 0, then f v = 0 –if v is nonterminal with index(v) = i, then »f v = f v (x 1,...,x n ) = x’ i f low(v) + x i f high(v) Arguments x 1,...,x n describe path from root to terminal –for each vertex v, if index(v) = i, then »if x i = 0, go to low child »if x i = 1, go to high child

4 OBDD Examples 01 xixi i 01 01 x 1 x 2 + x 4 4 1 2 1 1 1 0 0 0 highlow terminals nonterminal 01 x 1 x 2 + x 3 x 4 + x 5 x 6 3 4 5 6 1 2 1 0 0 0 0 0 0 1 1 1 1 1

5 OBDD Properties Acyclic –ordering restriction => path from root to terminal has strictly increasing nonterminal index Reduced –no v s.t. low(v) = high(v) –no v, v’ s.t. subgraphs rooted at v, v’ are isomorphic Unique –only one reduced graph for boolean function f –up to an isomorphism –permits logic verification »if f and f’ are the same, then their OBDDs are isomorphic »comparison circuit is single terminal vertex with value 0 if circuits are the same

6 Graph Isomorphism – there exists a 1:1 function  mapping vertices from graph G to vertices in G’ s.t. –for all v, if  (v) = v’, then –v and v’ are terminals with value(v) = value(v’) –v and v’ are nonterminal with index(v) = index(v’),  (low(v)) = low(v’), s (high(v)) = high(v’) Easy for OBDDs –start at root, check vertex, children, recurse 01 4 1 2 0 1 0 0 1 1 10 4 1 2 01 0 0 11 Equiv?

7 OBDD Properities cont. Order dependence –changing variable ordering can greatly change graph –equivalent to relabeling variables Graphs sometimes explode –exponential size for multipliers –this is still an NP-complete problem

8 Reordering Example 01 x 1 x 2 + x 3 x 4 + x 5 x 6 3 4 5 6 1 2 left = low right = high Swap 2 & 4, 3 & 5 x 1 x 4 + x 2 x 5 + x 3 x 6 01 1 3 2 3 2 33 444 5 5 6 4

9 OBDD Data Structures Vertex structure type vertex = record low, high: vertex; index: 1..n+1; val: (0,1,X); id: integer;(unique id for vertex, 1..|G|) mark: boolean;(mark visited during traversal) end; Field values FieldTerminalNonterminal lowNULLlow(v) highNULLhigh(v) indexn+1index(v) valvalue(v)X

10 OBDD Operations OperationResultTime Complexity Reducereduce G O(|G| log(|G|)) Applyf 1 f 2 O(|G 1 | |G 2 |) Restrictf | xi = b O(|G| log(|G|)) Composef | xi = f2 O(|G 1 | 2 |G 2 |) Satisfy-onean element of S f O(n) Satisfy-allS f O(n |S f |) Satisfy-count|S f |O(|G|) S f = { (x 1,...,x n ) | f(x 1,...,x n ) = 1 }

11 Algorithm Example: Satisfy-one Return true if f is satisfiable, false otherwise Return variable assignment x Start at root vertex v boolean Satisfy-one(v, x) vertex v; integer x[1..n]; { if (v.value = 0) return(false); /* failure */ if (v.value = 1) return(true); /* success */ x[i] = 0; if (Satisfy-one(v.low, x)) return(true); x[i] = 1; return(Satisfy-one(v.high, x)); }

12 Verification Example C0 C1 C2 C0 C1 C2 c2’ + (c0’ c1’)’ ((((c0’ c1’)’)’ c2)’)’ ((c0’ c1’)’)’)’ 01 2 0 1 1 1 1 0 0 0


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