1. 5/27/99 Ashish Sabharwal1 Cache Misses - The 3 C’s n Compulsory misses –cold start –don’t have a choice –except that by increasing block size, can reduce the number of distinct blocks that are requested n Capacity misses –cache is much smaller than total addressable memory n Conflict misses –collision within a set –requested block was thrown out when some other block wanted to occupy the same position –can reduce by increasing assiciativity (each block has more options) n What can I measure directly? –Compulsory - yes (check for first reference) –Conflict - yes (remember if block was thrown out because of some other block) –Capacity - no But Capacity = Total - Compulsory - Conflict

2. 5/27/99 Ashish Sabharwal2 The Assignment n Read input using system calls –Input: 1 20 1 40 1 32 2 23 1 34 1 20 1 22 0 0 –Read both operation and address using system call 5 (read_int) n Maintain a cache (without data) –will need valid/tag/dirty bits n Keep counters for the 3 C’s n How to decide whether a miss is compulsory or capacity? –Cold start –Keep track of what all you have already seen How much memory to allocate for this? Use stack!

3. 5/27/99 Ashish Sabharwal3 Cache Replacement Policies n Not needed for direct mapped cache –why? n Ideally: Least Likely to be Used –natural! n LRU –For each set, maintain the order in which elements were referenced –Why does this work? –Given temporal locality, a good approximation to the ideal policy n Random –For small associativity (~2), doesn’t really matter –For large associativity, may accidentally (and unnecessarily) throw away a block that is being used now –Might also approximate the ideal policy better! –Works well in practice...

4. 5/27/99 Ashish Sabharwal4 Computing Cache Implementation Bits n Total implementation bits = data bits + valid bits + tag bits n (7.24)Address size = k bits Cache size = S bytes Block size = B = 2 b bytes Associativity = A ¶ data bits = S x 8 = 8S bits · valid bits = 1 x (number of blocks) = S/B bits ¸ tag bits = (tag bits per address) x (blocks/cache) tag bits per address = log 2 ( (memory size / cache size) x A ) = k - log 2 ( S/A ) Hence, total tag bits = ( k - log 2 ( S/A ) ) x ( S/B )