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1 1998 Morgan Kaufmann Publishers CH5 Datapath review
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2 1998 Morgan Kaufmann Publishers The single cycle datapath of an add instruction 100 add rd, rs, rt 0rsrtrd0 rs rt 0X20 rd
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3 1998 Morgan Kaufmann Publishers The single cycle datapath of load instruction 104 lw $rt, $rs, offset 0x23rsrtOffset rs rt Offset
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4 1998 Morgan Kaufmann Publishers The multi cycle datapath of add instruction add rd, rs, rt 0rsrtrd00X20
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5 1998 Morgan Kaufmann Publishers Step 1 taken to execute add instruction Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR
![5 1998 Morgan Kaufmann Publishers Step 1 taken to execute add instruction Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR](http://images.slideplayer.com./17/5348636/slides/slide_5.jpg "5 1998 Morgan Kaufmann Publishers Step 1 taken to execute add instruction Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR")
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6 1998 Morgan Kaufmann Publishers Step 1 taken to execute add instruction
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7 1998 Morgan Kaufmann Publishers The multi cycle datapath of add instruction (cycle 1) add rd, rs, rt 0rsrtrd00X20
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8 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) % Speculative Computing Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 2 taken to execute add instruction
![8 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) % Speculative Computing Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 2 taken to execute add instruction](http://images.slideplayer.com./17/5348636/slides/slide_8.jpg "8 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) % Speculative Computing Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 2 taken to execute add instruction")
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9 1998 Morgan Kaufmann Publishers Step 2 taken to execute add instruction
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10 1998 Morgan Kaufmann Publishers The multi cycle datapath of add instruction (cycle 2) add rd, rs, rt 0rsrtrd00X20 rs rt ALUOut = PC + (sign-extend(IR[15-0]<<2)) (Speculative Computing)
![10 1998 Morgan Kaufmann Publishers The multi cycle datapath of add instruction (cycle 2) add rd, rs, rt 0rsrtrd00X20 rs rt ALUOut = PC + (sign-extend(IR[15-0]<<2)) (Speculative Computing)](http://images.slideplayer.com./17/5348636/slides/slide_10.jpg "10 1998 Morgan Kaufmann Publishers The multi cycle datapath of add instruction (cycle 2) add rd, rs, rt 0rsrtrd00X20 rs rt ALUOut = PC + (sign-extend(IR[15-0]<<2)) (Speculative Computing)")
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11 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 3 taken to execute add instruction
![11 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 3 taken to execute add instruction](http://images.slideplayer.com./17/5348636/slides/slide_11.jpg "11 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 3 taken to execute add instruction")
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12 1998 Morgan Kaufmann Publishers Step 3 taken to execute add instruction
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13 1998 Morgan Kaufmann Publishers The multi cycle datapath of add instruction (cycle 3) add rd, rs, rt 0rsrtrd00X20 ALUOut = A op B
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14 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 4 taken to execute add instruction
![14 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 4 taken to execute add instruction](http://images.slideplayer.com./17/5348636/slides/slide_14.jpg "14 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 4 taken to execute add instruction")
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15 1998 Morgan Kaufmann Publishers Step 4 taken to execute add instruction
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16 1998 Morgan Kaufmann Publishers The multi cycle datapath of add instruction (cycle 4) add rd, rs, rt 0rsrtrd00X20
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17 1998 Morgan Kaufmann Publishers The multi cycle datapath of lw instruction 0x23rsrtOffset lw rt, offset(rs)
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18 1998 Morgan Kaufmann Publishers Step 1 taken to execute lw instruction Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR
![18 1998 Morgan Kaufmann Publishers Step 1 taken to execute lw instruction Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR](http://images.slideplayer.com./17/5348636/slides/slide_18.jpg "18 1998 Morgan Kaufmann Publishers Step 1 taken to execute lw instruction Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR")
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19 1998 Morgan Kaufmann Publishers lw rt, offset(rs) 0x23rsrtOffset The multi cycle datapath of lw instruction (cycle 1)
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20 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 2 taken to execute lw instruction
![20 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 2 taken to execute lw instruction](http://images.slideplayer.com./17/5348636/slides/slide_20.jpg "20 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 2 taken to execute lw instruction")
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21 1998 Morgan Kaufmann Publishers The multi cycle datapath of lw instruction (cycle 2) rs rt ALUOut = PC + (sign-extend(IR[15-0]<<2)) (Speculative Computing) lw rt, offset(rs) 0x23rsrtOffset
![21 1998 Morgan Kaufmann Publishers The multi cycle datapath of lw instruction (cycle 2) rs rt ALUOut = PC + (sign-extend(IR[15-0]<<2)) (Speculative Computing) lw rt, offset(rs) 0x23rsrtOffset](http://images.slideplayer.com./17/5348636/slides/slide_21.jpg "21 1998 Morgan Kaufmann Publishers The multi cycle datapath of lw instruction (cycle 2) rs rt ALUOut = PC + (sign-extend(IR[15-0]<<2)) (Speculative Computing) lw rt, offset(rs) 0x23rsrtOffset")
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22 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 3 taken to execute lw instruction
![22 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 3 taken to execute lw instruction](http://images.slideplayer.com./17/5348636/slides/slide_22.jpg "22 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 3 taken to execute lw instruction")
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23 1998 Morgan Kaufmann Publishers The multi cycle datapath of lw instruction (cycle 3) lw rt, offset(rs) 0x23rsrtOffset ALUOut = A + sign-extend (IR[15-0])
![23 1998 Morgan Kaufmann Publishers The multi cycle datapath of lw instruction (cycle 3) lw rt, offset(rs) 0x23rsrtOffset ALUOut = A + sign-extend (IR[15-0])](http://images.slideplayer.com./17/5348636/slides/slide_23.jpg "23 1998 Morgan Kaufmann Publishers The multi cycle datapath of lw instruction (cycle 3) lw rt, offset(rs) 0x23rsrtOffset ALUOut = A + sign-extend (IR[15-0])")
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24 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 4 taken to execute lw instruction
![24 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 4 taken to execute lw instruction](http://images.slideplayer.com./17/5348636/slides/slide_24.jpg "24 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 4 taken to execute lw instruction")
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25 1998 Morgan Kaufmann Publishers The multi cycle datapath of lw instruction (cycle 4) lw rt, offset(rs) 0x23rsrtOffset
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26 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 5 taken to execute lw instruction
![26 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 5 taken to execute lw instruction](http://images.slideplayer.com./17/5348636/slides/slide_26.jpg "26 1998 Morgan Kaufmann Publishers Step name Action for R- type instructions Action for memory- reference instructions Action for branches Action for jumps Instruction fetch IR = Memory[PC] PC = PC + 4 Instruction decode/register fetch A = Reg [IR[25-21]] B = Reg [IR[20-16]] ALUOut = PC + (sign-extend(IR[15-0]<<2)) Execution, address computation, branch/jump computation ALUOut = A op B ALUOut= A + sign-extend (IR[15-0]) If(A==B) then PC = ALUOut PC=PC[31-28] || (IR[25-0]<<2) Memory access or R-type completion Reg[IR[15-11]] = ALUout Load : MDR = Memory[ALUout] or Store : Memory[ALUout] = B Memory read completion Load : Reg [IR[20-16]] = MDR Step 5 taken to execute lw instruction")
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27 1998 Morgan Kaufmann Publishers The multi cycle datapath of lw instruction (cycle 5) lw rt, offset(rs) 0x23rsrtOffset
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28 1998 Morgan Kaufmann Publishers Exceptions (overflow)
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29 1998 Morgan Kaufmann Publishers The multi cycle datapath of add instruction with overflow (cycle 3) add rd, rs, rt 0rsrtrd00X20 pcsource = 11
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30 1998 Morgan Kaufmann Publishers The multi cycle datapath of add instruction with overflow (cycle 4) add rd, rs, rt 0rsrtrd00X20 pcsource = 11 Cause = 1 EPC = PC (=PC old +4) – 4 PC = C0000…
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31 1998 Morgan Kaufmann Publishers Exceptions (undefined instruction)
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32 1998 Morgan Kaufmann Publishers The multi cycle datapath of undefined instruction (cycle 2) undef rd, rs, rt 0x16rsrtrd00x10 pcsource = 11 ?
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