Presentation is loading. Please wait.

Presentation is loading. Please wait.

MICE Tracker Readout Increased Data Readout Rate VLSB Development 16 AFE II t boards 8 Visible Light Photon Counter (VLPC) cassettes 4 cryostats.

Similar presentations


Presentation on theme: "MICE Tracker Readout Increased Data Readout Rate VLSB Development 16 AFE II t boards 8 Visible Light Photon Counter (VLPC) cassettes 4 cryostats."— Presentation transcript:

1 MICE Tracker Readout Increased Data Readout Rate VLSB Development 16 AFE II t boards 8 Visible Light Photon Counter (VLPC) cassettes 4 cryostats

2 MICE Requirements for Tracker Readout Data Rate: MICE has established goal of reading out 600 muons every 1 ms spill. –D0 tracker readout optimized for TeVatron beam. –For MICE, current microcoding allows ~225 muons/ms. Data Readout: MICE tracker data will be read out to VME LVDS Serdes Buffer (VLSB) banks. –D0 data read out to digital boards and SVX sequencers. IIT MICE group is modifying AFE-IIt firmware to realize these MICE requirements.

3 Data Rate through Zero-Suppression D0 firmware uses 6 clock cycles for every AFE II t channel. For channels above threshold, ~100 ns or about 6 clock cycles is needed for digitization. (1 clock cycle = 1/53.104 MHz = 18.831 ns) Reduce digitization time by using 1 or 2 clock cycles for channels below threshold. Illustration of timing of 4 channels below threshold followed by 1 channel above threshold for compression scheme and nominal scheme.

4 List of 4 channels above threshold Channels 9, 17, 20, and 27 being digitized Simulated MICE Tracker Data Readout Signals

5 Data Rate What's done: – Modified analog FPGA (AFPGA) firmware generating signals appropriate for data rate scheme. Signals to ADCs Signals to TriP-t (Trigger and Pipeline with timing) chips – Signal simulations verifying that code logic is correct. What needs to be done: – Firmware providing bitmap to the AFPGA to implement data rate scheme (Senerath’s talk reports progress.). – Verification of digitization with input signals. – Further modifications to make data readout compatible with ISIS beam.

6 Data Readout What had been done in October: – Firmware written which Transfers sequence of test data words into AFE-IIt RAM blocks Read out test data from RAM blocks to VLSB banks via Low-Voltage Differential Signaling (LVDS) lines. What’s been done recently: – Wrote firmware which has VLSB store data from multiple triggers before readout. – Verified that VLSB hardware is fine and that firmware modifications are needed for MICE operation. What needs to be done: – Work with D0 VLSB experts to fix/modify VLSB firmware. – Test this AFE-IIt readout to VLSB with LED/cryostat/VLPC system.

7 Anticipated Schedule Now: AFE-IIt boards reserved for MICE We have 8 AFE-IIt boards (4 LH and 4 RH). Paul Rubinov, supervisor of the AFE-IIt testing, told me “MICE gets boards when MICE needs boards.” Late November, early December: Firmware coding done Late November: Firmware testing with input signals and AFE-IIt boards. Late 2006, early 2007: Test AFE-IIt readout to VLSB with cryostat/LED/VLPCs.


Download ppt "MICE Tracker Readout Increased Data Readout Rate VLSB Development 16 AFE II t boards 8 Visible Light Photon Counter (VLPC) cassettes 4 cryostats."

Similar presentations


Ads by Google