1. Intel ® Research mote Ralph Kling Intel Corporation Research Santa Clara, CA

2. 2 Overview Intel mote project goals Project status and direction Intel mote hardware Intel mote software Summary and outlook Intel mote prototype

3. 3 Intel mote project goals Develop an enhanced universal mote building block High platform integration level (core, radio, memory…) High platform integration level (core, radio, memory…) Low power operation Low power operation Small physical size Small physical size Modular HW/SW design Modular HW/SW design System power management System power management Low cost and volume production potential Low cost and volume production potential Support and collaboration on sensor network research Multi-hop networking Multi-hop networking Power aware routing Power aware routing

4. 4 Detailed research areas Ultra low power operation Smart wireless communication Smart wireless communication Battery lifetime of up to a year Battery lifetime of up to a year System level integration CPU and radio component integration CPU and radio component integration RF direct to antenna output RF direct to antenna output System level partitioning and optimization System level partitioning and optimization Integration of different technologies Integration of different technologies Digital, analog, MEMS, memory… Power and performance efficient HW reconfiguration Task specific acceleration Task specific acceleration Flexibility with good power/performance trade-off Flexibility with good power/performance trade-off η

5. 5 Project status and direction 1 st generation Intel mote Package level integration 2 nd generation Intel mote HW and SW improvements 3 rd generation Intel mote New integrated design Future Single chip with layered components We are here: Intel mote prototype 2002200320042005 Sensor MEMS Nonvolatile storage RF MEMS Digital/analog silicon Battery UCB mote

6. 6 Intel Research mote summary Enhanced building block for wireless sensor networks Applications Participants Intel research labs Academic research Start-ups Status Business model development studied Feedback from Berkeley Lab collected CPU/Radio component evaluation done Architecture specification completed Second prototype HW/SW created Overview CPU core Wireless radio Sensor interface Firefighting and rescue Process monitoring and control Structure and earthquake monitoring Agriculture Military 900MHzUWB?Zigbee?BT ARMAtmel AnalogDigital Current spec

7. 7 1 st generation Intel mote goals Provide improved features Reliability of radio links Reliability of radio links Increased CPU performance Increased CPU performance Security features Security features Modular design Modular design Reduced cost Reduced cost Competitive battery life Assumed duty cycle <1% Assumed duty cycle <1% HW solutions: power down modes HW solutions: power down modes SW solutions: smart networking protocols SW solutions: smart networking protocols

8. 8 Intel mote hardware Intel mote is a modular, stackable design Power supply board (battery, AC, solar, …) Power supply board (battery, AC, solar, …) Main board (ARM core, SRAM, FLASH, BT radio) Main board (ARM core, SRAM, FLASH, BT radio) Sensor board(s) Sensor board(s) Other boards (alternate radio, debug, actuator, …) Other boards (alternate radio, debug, actuator, …) Backbone interconnect provides power, signaling Power board Main board Sensor board Backbone interconnect

9. 9 Intel mote and sensor net software Based on TinyOS Port to ARM architecture Port to ARM architecture Intel mote specific layer BT support BT support Platform device drivers Platform device drivers Network layer Topology establishment Topology establishment Single- and multi-hop routing Single- and multi-hop routing Security features Authentication Authentication Encryption Encryption TinyOS applications TinyOS base Network layer Intel mote layer Intel mote firmware (BT) Intel mote hardware

10. 10 Summary The Intel mote project is now ~7 months old Status Prototype HW developed Prototype HW developed TinyOS based SW stack near completion TinyOS based SW stack near completion Start of pilot project investigations Start of pilot project investigations Academic and commercial Challenges for 2003 Enable volume production in 1H 2003 Enable volume production in 1H 2003 Promote Intel mote in research and industry Promote Intel mote in research and industry Deliver easy to use Intel mote sensor network kit Deliver easy to use Intel mote sensor network kit Start design of next generation Intel mote Start design of next generation Intel mote

11. 11 Intel mote vs. Berkeley mote Original mote design by University of California at Berkeley Retained or extended features TinyOS base TinyOS base Modular design Modular design Multi-hop networking Multi-hop networking New or changed features ARM based CPU core ARM based CPU core BT radio BT radio

12. 12 Why Bluetooth? Availability of SOC integrated devices Single chip BT/controller/memory Single chip BT/controller/memory Low cost, availability from many sources Low cost, availability from many sources On technology curve 0.18u -> 0.13u this year On technology curve 0.18u -> 0.13u this year Radio features Link level reliability and security provisions Link level reliability and security provisions Nominally higher power (~3-5x single channel 900MHz radios) Nominally higher power (~3-5x single channel 900MHz radios) 7-10x higher bandwidth Spread spectrum operation increases link reliability Precise synchronization within piconets Looking forward to measuring effective power consumption Looking forward to measuring effective power consumption

13. 13 Intel mote technical details ARM core 12MHZ 12MHZ 64kB SRAM 64kB SRAM 512kB FLASH 512kB FLASH BT radio Up to +4dbm transmit Up to +4dbm transmit -80dbm receive -80dbm receive >30m range >30m range Battery life (projected) at 1% duty cycle >1 month with coin cells >1 month with coin cells >6 months with AA cells >6 months with AA cells I 2 C backbone interconnect 100kb/s transfer rate (up to 400kb/s in future revisions) 100kb/s transfer rate (up to 400kb/s in future revisions) Debug connector UART, USB slave, JTAG UART, USB slave, JTAG