1. Midterm Wednesday Chapter 1-3: Number /character representation and conversion Number arithmetic CMOS logic elements Combinational logic elements and design (DeMorgan’s Law) Sequential logic elements (Flip Flops) Memory organization and implementation Clocks and timing

2. Overview Finite State Machines - Sequential circuits with inputs and outputs State Diagrams - An abstraction tool to visualize and analyze sequential circuits

3. Combinational vs. Sequential Circuits Combinational Circuit –always gives the same output for a given set of inputs example: adder always generates sum and carry, regardless of previous inputs Sequential Circuit –has memory - “stores” information, –output depends on stored information (state) plus input so a given input might produce different outputs, depending on the stored information –example: ticket counter advances when you push the button output depends on previous state –useful for building “memory” elements and “state machines”

4. Combinational vs. Sequential Logic There are two types of “combination” locks 4184 30 15 5 1020 25 Combinational: Success depends only on the values, not the order in which they are set. Sequential: Success depends on the sequence of values (e.g, R-13, L-22, R-3).

5. State Machine A type of sequential circuit –Combines combinational logic with storage –“Remembers” state, and changes output (and state) based on inputs and current state State Machine Combinational Logic Circuit Storage Elements InputsOutputs

6. State The state of a system is a snapshot of all the relevant elements of the system at the moment the snapshot is taken. Examples: –The state of a basketball game can be represented by the scoreboard. (Number of points, time remaining, possession, etc.) –The state of a tic-tac-toe game can be represented by the placement of X’s and O’s on the board.

7. State of Sequential Lock Our lock example has four different states, labelled A-D: A: The lock is not open, and no relevant operations have been performed. B:The lock is not open, and the user has completed the R-13 operation. C:The lock is not open, and the user has completed R-13, followed by L-22. D:The lock is open.

8. Finite State Machine A description of a system with the following components: 1.A finite number of states 2.A finite number of external inputs 3.A finite number of external outputs 4.An explicit specification of all state transitions 5.An explicit specification of what determines each external output value Often described by a state diagram. - The set of all possible states. - Inputs that trigger state transitions. - Outputs associated with each state (or with each transition).

9. State Diagram Shows states (e.g. A) and actions (e.g. B) that cause a transition between states.

10. The Clock Frequently, a clock circuit triggers transition from one state to the next. At the beginning of each clock cycle, the state machine makes a transition, based on the current state and the external inputs (Synchronous). –Not always required. In lock example, the input itself triggers a transition (Asynchronous). “1” “0” time  One Cycle

11. Implementing a Finite State Machine Combinational logic –Determine outputs at each state. –Determine next state. Storage elements –Maintain state representation. State Machine Combinational Logic Circuit Storage Elements InputsOutputs Clock

12. Storage Each master-slave flipflop stores one state bit. The number of storage elements (flipflops) needed is determined by the number of states (and the representation of each state). Examples: –Sequential lock Four states – two bits –Basketball scoreboard 7 bits for each score digit, 5 bits for minutes, 6 bits for seconds,1 bit for possession arrow, 1 bit for half, …

13. Complete Example – Traffic Sign Design a “blinking” traffic sign which exhibits this behavior: State 1) No lights on  State 2) 1 & 2 on  State 3) 1, 2, 3, & 4 on  State 4) 1, 2, 3, 4, & 5 on  State 1) No lights on . ( - Repeat as long as operate switch is turned on. - The system is in state 1 when the operate switch is off) DANGER MOVE RIGHT 1 2 3 4 5

14. Traffic Sign State Diagram State bit S 1 State bit S 0 Switch on Switch off Outputs State Transitions occur on each clock cycle.

15. Traffic Sign Truth Tables Outputs (depend only on state: S 1 S 0 ) S1S1 S0S0 ZYX 00000 01100 10110 11111 Lights 1 and 2 Lights 3 and 4 Light 5 Next State: S 1 ’ S 0 ’ (depend on state and input) InS1S1 S0S0 S1S1 S0S0 0XX00 10001 10110 11011 11100 Switch Whenever In=0, next state is 00.

16. Traffic Sign Combinational Logic Master-slave, or Edge Triggered D flipflops