1. Completed TasksTasks in Progress Raphael Build peak-and-hold circuit on PCB Configure external ADC and interface w/ PIC Dan Write PIC code for constant time-to-sample, making sure to enable/read A/D and reset the comparator Test PIC code Sam Timing diagram Block diagram Set up low-speed, control transfer USB between PIC and PC Chen Look up desirable traits of commercial MCA GUIs

2. Signal Peak-and-Hold Comparator JK Flip-flop ADC 1 horizontal unit = 5 clock cycles = 250 ns After detecting rising- edge of comparator, count x (in this case 5) clock pulses, then enable ADC Assuming 800 kcps, the ADC takes 1.25 μs to sample Threshold Baseline Timing Diagram Reset

3. Comparator JK Flip-flop ADC Clock Reasons for a Flip-flop Prevents system from paralyzing A 2 nd data sampling cycle can’t begin in the midst of the 1 st Anything else? Positive edge- triggered Count 5 clock cycles before starting ADC

4. Signal Comparator Peak and Hold ADC USB Gain PIC Block Diagram Mac Buffer Threshold Coincidence/Anti-coincidence 10

5. Signal Comparator Peak and Hold ADC USB Gain PIC Mac Buffer Threshold Coincidence/Anti-coincidence 10

6. 4 Knobs 1) Input gain 2) Threshold voltage 3) Time-to-sample 4) Coincidence, anti-coincidence, and no coincidence Group Tasks Test/fix the detector, pre-amplifier, and shaping-amplifier Look at the pulses coming from the X-ray source