1. 20 10 School of Electrical Engineering &Telecommunications UNSW ENGINEERING @ UNSW 10 Author: Jeremy Wong Heng MengSupervisor:Prof. Andrew Steven Dzurak Student ID: 3214643Assessor: Prof. Chee Yee Kwok Quantum Effects in Silicon MOS Nanostructures Abstract Processes such as prime factorization, high-security encryption and complicated simulations often require exponentially long times to run on conventional computers. The simplest solution is to make more powerful processors, by utilizing smaller transistors. This trend of miniaturization cannot continue indefinitely, and will soon reach its quantum limit. Engineers are now veering towards the use of quantum computers to perform these operations in much shorter times. The implementation of semiconductor based qubits will require additional devices to read off its logic state. One such device is the Quantum Point Contact. Problem Statement To determine whether it is possible with the current available technology, to observe quantized ballistic conductance in Silicon MOS quantum point contact nanostructures. 1. What is a Quantum Point Contact (QPC) A QPC is a narrow constriction on the flow of electrons in a Two-Dimensional Electron Gas (2-DEG). The constriction only allows electrons with certain energies to pass through. This causes the total conductance through the 2-DEG channel to be quantized into units of. 2. Application A QPC can be used to detect the movement of a single electron. By setting the QPC into a state between two steps, any small disturbance in the voltage of the one gate, resulting from the movement of a single electron, will cause the device to transition into one of the adjacent plateaus. 3. Why Silicon Other semiconductor qubit implementations have considered materials such as GaAs. This project uses Si/SiO 2 devices. Advantages of Silicon: - Highly abundant element - Easy to interface with existing Silicon systems - Low spin-orbit coupling leads to long coherence time 7. Experimental Results 5. Nanofabrication Electron Beam Lithography (EBL) was used to trace the gate patterns onto the chip, coated with PMMA A4 EBL-resist. 6. Measurement The devices were measured in a 4.2 K liquid Helium (He 4 ) dewar. AC voltage excitation was provided across the source-drain, and the channel current was measured using a lock-in amplifier. 8. Conclusion Quantization of the channel conductance has been experimentally observed, with the presence of valley splitting. Therefore the devices fabricated using the stacked Aluminium gate structure, developed at UNSW, have demonstrated ballistic transport behavior, comparable with the best observed in Silicon MOS devices. 9. Future Work -Measure valley splitting energy -Fabricate QPC next to single electron transistor to test its charge sensing capability - Use as charge sensor to read Silicon qubit logic states 4. Computer Simulation Computer simulations performed using TCAD show: - Saddle-shaped potential - Inversion layer formation and threshold voltage - Electron depletion by barrier gates - Electron constriction between barrier gates - Barrier gates able to pinch off electron channel