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ECE 232 L1 Intro.1 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers ECE 232 Hardware Organization and Design Lecture 1 Introduction.

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Presentation on theme: "ECE 232 L1 Intro.1 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers ECE 232 Hardware Organization and Design Lecture 1 Introduction."— Presentation transcript:

1 ECE 232 L1 Intro.1 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers ECE 232 Hardware Organization and Design Lecture 1 Introduction Maciej Ciesielski KEB 209 B ciesiel@ecs.umass.edu

2 ECE 232 L1 Intro.2 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Overview °Course organization °Syllabus Objective TA’s – to be decided Office hours – to be decided (need your input) Textbook: Computer Organizaton and Design: A Hardware-Software Interface, D. Patterson, J. Hennesy, K.M.P., 2 nd edition. Prerequisite: ECE 221 (Logic Design), C or better ! Everything is on the web, check it frequently: www.ecs.umass.edu/ece/labs/vlsicad/ece232/spr2002/index_232.html °Slides, homework posted on the web prior to class, not distributed °Organization and Anatomy of a Computer

3 ECE 232 L1 Intro.3 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Syllabus ECE 232 °Objectives Basic concepts in Computer Architecture (MIPS) Emphasis on digital hardware Interface: Hardware - Software Assembly language + simulation (SPIM) Hardware description languages (VHDL) + simulation (Altera) °Outline Introduction Performance Instruction set architecture, assembly language Digital Logic (review) Datapath design, pipelining Control logic design Memory hierarchy

4 ECE 232 L1 Intro.4 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Grading Policy °Homework ~7 assignments, some programming (assembly, VHDL) Assignments due in class on due date Penalty for late homework: 20% per day Homework assignments will be posted on the web, solutions not °Grading Homework35% Midterm I20% (March 5, 7 during class) Midterm II20% (April 17 or 22, evening) Final exam25% °No CHEATING !!

5 ECE 232 L1 Intro.5 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers What you should know from ECE 122 and 232 °Read and write basic C programs °Understand the steps in a makefile, what they do compile, link, load & execute °Logic design logical equations, schematic diagrams, Combinational vs sequential logic Finite state machines (FSMs) °Basic machine structure processor, memory, I/O

6 ECE 232 L1 Intro.6 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers What is “Computer Architecture” Computer Architecture = Instruction Set Architecture (software) + Machine Organization (hardware)

7 ECE 232 L1 Intro.7 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Instruction Set Architecture (subset of Computer Arch.)... the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation. – Amdahl, Blaaw, and Brooks, 1964SOFTWARE -- Organization of Programmable Storage -- Data Types & Data Structures: Encodings & Representations -- Instruction Set -- Instruction Formats -- Modes of Addressing and Accessing Data Items and Instructions -- Exceptional Conditions

8 ECE 232 L1 Intro.8 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers The Instruction Set: a Critical Interface instruction set software hardware

9 ECE 232 L1 Intro.9 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Example ISAs (Instruction Set Architectures) °Digital Alpha1992 - 2001 °HP PA-RISC1986 - today °Sun Sparc1987 - today °SGI MIPS1986 - ? °Intel (8086,80286,80386, 1978-tomorrow 80486,Pentium, MMX,...)

10 ECE 232 L1 Intro.10 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Computer Organization Logic Designer's View ISA Level FUs and Interconnect °Capabilities and performance characteristics of principal Functional Units (FU) (Registers, ALU, Shifters, Logic Units,...) °Ways in which these components are interconnected °Information flows between components °Logic and means by which such information flow is controlled. °Choreography of FUs to realize the ISA °Register Transfer Level (RTL) description

11 ECE 232 L1 Intro.11 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers What is “Computer Architecture”? I/O systemInstr. Set Proc. Compiler Operating System Application Digital Design Circuit Design Instruction Set Architecture Firmware °Coordination of many levels of abstraction °Under a rapidly changing set of forces °Design, Measurement, and Evaluation Datapath & Control Layout

12 ECE 232 L1 Intro.12 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Course Content Computer Architecture and Engineering Instruction Set DesignComputer Organization InterfacesHardware Components Compiler/System ViewLogic Designer’s View ­“Building Architect”­“Construction Engineer”

13 ECE 232 L1 Intro.13 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers ECE 232: So what's in it for me? °In-depth understanding of the inner-workings of modern computers, their evolution, and trade-offs present at the hardware/software boundary. Insight into fast/slow operations that are easy/hard to implementation hardware °Experience with the design process in the context of a large complex (hardware) design. Functional Spec  Control & Datapath  Physical implementation Modern CAD tools °Designer's "Conceptual" toolbox.

14 ECE 232 L1 Intro.14 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Conceptual tool box? °Evaluation Techniques °Levels of translation (e.g., Compilation) °Levels of Interpretation (e.g., Microprogramming) °Hierarchy (e.g, registers, cache, memory, disk, tape) °Pipelining and Parallelism °Static / Dynamic Scheduling °Indirection and Address Translation °Synchronous and Asynchronous Control Transfer °Timing, Clocking, and Latching °CAD Programs, Hardware Description Languages, Simulation °Physical Building Blocks (e.g., CLA) °Understanding Technology Trends


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