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Floorplanning
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Obtained by subdividing a given rectangle into smaller rectangles. Each smaller rectangle corresponds to a module.
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Slicing Floorplan A slicing floorplan can be obtained by repeatedly subdividing rectangles horizontally or vertically.
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Slicing Floorplan and Slicing Graph Slicing Floorplan Non-slicing Floorplan
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Slicing Floorplan and Slicing Graph Slicing Floorplan Slicing Graph corner Not a Slicing Floorplan Not a Slicing Graph
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Slicing Tree
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P 1
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P 1 P : V 1 root
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Slicing Tree P 1 P : V 1 Right subgraph becomes right subtree Left subgraph becomes left subtree root
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Slicing Tree P 2 P : V 1 root
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Slicing Tree P 2 P : V 1 2 root
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Slicing Tree P 3 P : V 1 2 root
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Slicing Tree P 3 P : V 1 2 P : H 3 root
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Slicing Tree P 3 P : V 1 2 P : H 3 Upper subgraph becomes right subtree Lower subgraph becomes left subtree root
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Slicing Tree f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 root
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Graph representation of Floorplan Polar graphs Adjacency graphs Channel Intersection Graphs Channel position graphs
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Polar Graphs Vertical polar graph Horizontal polar graph source sink source sink
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Polar Graphs Vertical polar graph Horizontal polar graph source sink source sink Used to determine the area of the smallest floorplan.
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Adjacency Graphs A D B C E F G H A B C D E F H G source sink Horizontal adjacency graph source sink A B C D E F G H Vertical adjacency graph
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Channel Intersection Graphs A C B D
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Channel Position Graphs A C B D A B C D AB C D Horizontal channel Position graph Vertical channel position graph
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Given circuit modules (or cells) and their connections, determine the approximate location of circuit elements
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Cost functions for floorplanning Minimize area Minimize wirelength Maximize routability Minimize delays
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E A B C F G D A B E C F G D VLSI Floorplanning with adjacency requrements Interconnection graph VLSI floorplan
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E A B C F G D A B E C F G D VLSI Floorplanning Interconnection graph VLSI floorplan
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E A B C F G D A B E C F G D VLSI Floorplanning Interconnection graph VLSI floorplan
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E A B C F G D A B E C F G D VLSI Floorplanning A B E C F G D Interconnection graph VLSI floorplan Dual-like graph
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E A B C F G D A B E C F G D VLSI Floorplanning A B E C F G D A B E C F G D Interconnection graph VLSI floorplan Dual-like graphAdd four corners
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E A B C F G D A B E C F G D VLSI Floorplanning A B E C F G D A B E C F G D Interconnection graph VLSI floorplan Dual-like graphAdd four corners Rectangular drawing
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E A B C F G D A B E C F G D VLSI Floorplanning Interconnection graph VLSI floorplan Rectangular drawing
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E A B C F G D A B E C F G D VLSI Floorplanning Interconnection graph VLSI floorplan Rectangular drawing Unwanted adjacency Not desirable for MCM floorplanning and for some architectural floorplanning.
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A B E C F G D MCM Floorplanning Sherwani Sherwani Architectural Floorplanning Munemoto, Katoh, Imamura Munemoto, Katoh, Imamura E A B C F G D Interconnection graph
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A B E C F G D MCM Floorplanning Architectural Floorplanning E A B C F G D Interconnection graph
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MCM Floorplanning Architectural Floorplanning A E B F G C D E A B C F G D Interconnection graph Dual-like graph A B E C F G D
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MCM Floorplanning Architectural Floorplanning A E B F G C D E A B C F G D Interconnection graph Dual-like graph A B E C F G D
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MCM Floorplanning Architectural Floorplanning A E B F G C D E A B C F G D A E B F G C D Interconnection graph Dual-like graph A B E C F G D
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MCM Floorplanning Architectural Floorplanning A E B F G C D E A B C F G D A E B F G C D Box-Rectangular drawing Interconnection graph Dual-like graph A B E C F G D dead space
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Floorplanning with Area Requirements
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Octagonal Drawing
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Prescribed-Area Octagonal Drawing Input Plane graph
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K 27 G 19 A 46 C 11 J 14 I 12 B 65 D 56 E 23 F 8 H 37 Prescribed-Area Octagonal Drawing Input Plane graph A real number for each inner face
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K 27 G 19 A 46 C 11 J 14 I 12 B 65 D 56 E 23 F 8 H 37 A 46 B 65 C 11 D 56 E 23 F 8 H 37 G 19 I 12J 14 K 27 Prescribed-Area Octagonal Drawing Input Output Plane graph Prescribed-area octagonal drawing A real number for each inner face
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K 27 G 19 A 46 C 11 J 14 I 12 B 65 D 56 E 23 F 8 H 37 A 46 B 65 C 11 D 56 E 23 F 8 H 37 G 19 I 12J 14 K 27 Prescribed-Area Octagonal Drawing Input Output Each inner face is drawn as a rectilinear polygon of at most eight corners. The outer face is drawn as a rectangle. Each face has its prescribed area.
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K 27 G 19 A 46 C 11 J 14 I 12 B 65 D 56 E 23 F 8 H 37 A 46 B 65 C 11 D 56 E 23 F 8 H 37 G 19 I 12J 14 K 27 Prescribed-Area Octagonal Drawing Input Output Each inner face is drawn as a rectilinear polygon of at most eight corners. The outer face is drawn as a rectangle. Each face has its prescribed area.
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2 1 1 2 Area requirements cannot be satisfied if each module is allowed to be only a rectangle. 2 1 1 2 Area requirements can be satisfied if each module is allowed to be a simple rectilinear polygon. 1 1 2 2 Applications VLSI Floorplanning It is desirable to keep the shape of each rectilinear polygon as simple as possible.
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Our Results G: a good slicing graph O(n) time algorithm.
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Slicing Tree
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f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 root
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Good Slicing Graph A slicing tree is good if each horizontal slice is a face path. P E P P P P P P P P P f f f f f f f f f 1 2 3 5 4 67 8 9 1 2 3 4 5 6 7 8 9 10 f P P N S W P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 P
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Three face paths On a boundary of a single face
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Not a face path
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Good Slicing Graph A slicing tree is good if each horizontal slice is a face path. P P P P P P P P P f f f f f f f f f 1 2 3 5 4 67 8 9 1 2 3 4 5 6 7 8 9 10 f P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1
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Good Slicing Graph A slicing tree is good if each horizontal slice is a face path. P P P P P P P P P f f f f f f f f f 1 2 3 5 4 67 8 9 1 2 3 4 5 6 7 8 9 10 f P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 We call a graph a good slicing graph if it has a good slicing tree.
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Good Slicing Graph For a horizontal slice, at least one of the upper subgraph and the lower subgraph cannot be vertically sliced. Cannot be vertically sliced Can be vertically sliced
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Not every slicing graph is a good slicing graph.
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Input P P P P P P P P P f f f f f f f f f 1 2 3 5 4 67 8 9 1 2 3 4 5 6 7 8 9 10 f P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 A Good Slicing Graph A Good Slicing Tree
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Output Prescribed-area Octagonal drawing Each inner face is drawn as a rectilinear polygon with at most eight corners. Particularly, each inner face is drawn as a rectilinear polygon of the following nine shapes. A 46 B 65 C 11 D 56 E 23 F 8 H 37 G 19 I 12J 14 K 27
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Octagons 8 corners 6 corners 4 corners
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Octagons A 46 B 65 C 11 D 56 E 23 F 8 H 37 G 19 I 12J 14 K 27
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Do not appear
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Feasible Octagons Octagons of nine shapes must satisfy some conditions on size
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 First traverse root Algorithm Then traverse the right subtree Finally, traverse the left subtree Depth-first search
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 Algorithm f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f P 1
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 Algorithm f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f P 1
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 Algorithm f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f P 2
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 Algorithm f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f P 3
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 Algorithm f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f P 3
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 Algorithm f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f P 4
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 Algorithm f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 Algorithm f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 Algorithm f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f
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P : V 1 2 P : H 4 3 7 9 8 P : V 5 P : H 6 f 9 f 10 f 8 f 6 f 7 f 4 f 3 f 2 f 5 f 1 Algorithm f f f f f f f f f 1 2 3 4 5 6 7 8 9 10 f
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Algorithm Initialization at root
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Algorithm Initialization at root Draw the outer cycle as an arbitrary rectangle of area A(G). A(G): sum of the prescribed areas of all inner faces in G.
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Algorithm Initialization at root Draw the outer cycle as an arbitrary rectangle of area A(G). A(G): sum of the prescribed areas of all inner faces in G.
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Algorithm Initialization at root Draw the outer cycle as an arbitrary rectangle of area A(G). A(G): sum of the prescribed areas of all inner faces in G. 5 9 15 8
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Algorithm Initialization at root Draw the outer cycle as an arbitrary rectangle of area A(G). A(G): sum of the prescribed areas of all inner faces in G. 5 9 15 8 W = 23 H = 20
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Algorithm Initialization at root Draw the outer cycle as an arbitrary rectangle of area A(G). A(G): sum of the prescribed areas of all inner faces in G. Fix arbitrarily the position of vertices on the right side of the rectangle preserving their relative positions.
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Root : vertical slice Operation at root Algorithm A(G) P r : V P v : V P w : V r v w A(G v ) A(G w ) PrPr A(G v )
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Root : vertical slice Operation at root Algorithm P r : V P v : V P w : V r v w
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Root : vertical slice Operation at root Algorithm P r : V P v : V P w : V r v w
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Root : vertical slice Operation at root Algorithm P r : V P v : V P w : V r v w
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Root : vertical slice Operation at root Algorithm P r : V P v : V P w : V r v w
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Root : vertical slice Operation at root Algorithm P r : V P v : V P w : V r v w
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Root : horizontal slice Operation at root Algorithm P r : H P v : V P w : V r v w R A(G v ) A(G w )
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Root : horizontal slice Operation at root Algorithm P r : H P v : V P w : V r v w A(G w ) A(G v ) R Case 1: A(G v ) = A(R) A(G v ) A(G w )
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Root : horizontal slice Operation at root Algorithm A(G w ) A(G v ) Case 2: A(G v ) > A(R) R A(G v ) A(G w )
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Root : horizontal slice Operation at root Algorithm Case 3: A(G v ) < A(R) Case 2: A(G v ) > A(R) A(G w ) A(G v ) A(G w )
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Root : horizontal slice Operation at root Algorithm 6 corners A(G w ) A(G v ) Case 3: A(G v ) < A(R) Case 2: A(G v ) > A(R) A(G w ) A(G v ) A(G w )
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Polygon of exactly 8 corners may appear when a horizontal slice is embedded inside a polygon of 6 corners. 6 corners 8 corners
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P u : V P v : V P w : V u v w General computation at an internal node Feasible Octagon R u Vertical slice
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P r : V P v : V P w : V u v w General computation at an internal node Feasible Octagon R u Vertical slice Fixed
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P r : V P v : V P w : V u v w General computation at an internal node Feasible Octagon R u Vertical slice Fixed Face
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P r : V P v : V P w : V u v w General computation at an internal node Feasible Octagon R u Embed the slicing path in R u Vertical slice
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P r : V P v : V P w : V u v w General computation at an internal node Feasible Octagon R u Vertical slice Feasible Octagon R v Feasible Octaon R w
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A(G v ) A(Gw)A(Gw) A(Gv)A(Gv)A(Gv)A(Gv) A(Gw)A(Gw) Large 10 corners Horizontal slice
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very small foot-lenght RuRu PuPu A(Gv)A(Gv) 10 corners
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very small foot-lenght RuRu PuPu f number of inner faces in G
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very small foot-lenght RuRu PuPu f number of inner faces in G K 27 G 19 A 46 C 11 J 14 I 12 B 65 D 56 E 23 F 8 H 37 Input A min A min = 8
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very small foot-lenght RuRu PuPu f number of inner faces in G H height of initial rectangle R r Input at root R r A(R ) = A(G) r H=20
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very small foot-lenght RuRu PuPu f number of inner faces in G K 27 G 19 A 46 C 11 J 14 I 12 B 65 D 56 E 23 F 8 H 37 Input A min A min = 8 A(R ) = A(G) r H=20
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very small foot-lenght RuRu PuPu f number of inner faces in G
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very small foot-lenght RuRu large enough East side
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very small foot-lenght RuRu large enough East side The number of inner faces each of which has an edge on the east side.
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Computation at a leaf node P E P W P S N P P E P W P S N P
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Time Complexity Overall time complexity is linear.
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Conclusion We have presented a linear algorithm for prescribed area octagonal drawings of good slicing graphs. Obtaining such an algorithm for larger classes of graphs is our future work. We also give a sufficient condition for a graph of maximum degree 3 to be a good slicing graph and give a linear-time algorithm to find a good slicing tree of such graphs.
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