1. 16/07/2015CSE1303 Part B lecture notes 1 Hardware Implementation Lecture B17 Lecture notes section B17

2. 16/07/2015CSE1303 Part B lecture notes 2 Last time  Analysis of translation  Writing efficient C

3. 16/07/2015CSE1303 Part B lecture notes 3 In this lecture  Gates  Combinatorial logic  adder  ALU  Sequential logic  flip-flop  memory  CPU  fetch-decode-execute cycle

4. 16/07/2015CSE1303 Part B lecture notes 4 How to make a computer  Computers are electronic equipment  contain many connected electronic components memorymemory Central Processing Unit (CPU)Central Processing Unit (CPU) specialized devices (network, video, etc.)specialized devices (network, video, etc.)  components largely made of circuits containing wires and gates

5. 16/07/2015CSE1303 Part B lecture notes 5 Gates  Tiny electronic switches  made of transistors  implement Boolean logic 0/1  low/high voltage0/1  low/high voltage digitaldigital  for given inputs, produce known output according to truth tableaccording to truth table  represented in circuit diagrams by symbols

6. 16/07/2015CSE1303 Part B lecture notes 6 Gates NOT In 1 In 2 Out 000 010 100 111 InOut01 10 AND In 1 In 2 Out000 011 101 111 OR In 1 In 2 Out000 011 101 110 XOR

7. 16/07/2015CSE1303 Part B lecture notes 7 Combinatorial logic  What about more complex truth tables?  Made by combining many gates together  wires connect inputs and outputs  each wire can carry only one bit, 0 or 1

8. 16/07/2015CSE1303 Part B lecture notes 8 Combinatorial logic  Circuits made from collections of gates  outputs depend only on inputs not on prior statenot on prior state  characterized by truth table  comparable to Boolean expression

9. 16/07/2015CSE1303 Part B lecture notes 9 Combinatorial logic X = (A & ~B) | (B & C) ABCX 0000 0010 0100 0111 1001 1011 1100 1111AB C X all three of forms are equivalent; each can be converted to the other two. 01 1 0 0 0 1 1 1 1 0 1 boolean expression logic circuit truth table

10. 16/07/2015CSE1303 Part B lecture notes 10 Combinatorial logic  Many parts of a computer are constructed of combinatorial logic  adder circuit performs additionperforms addition  arithmetic logic unit (ALU) performs many kinds of arithmetic and bitwise logical operationsperforms many kinds of arithmetic and bitwise logical operations contains adder circuitcontains adder circuit  multiplexer and decoder direct bit traffic between componentsdirect bit traffic between components

11. 16/07/2015CSE1303 Part B lecture notes 11 Adder  A combinatorial circuit that adds binary values  according to this truth table In 1 In 2 SumCarry 0000 0110 1010 1101 Sum is equivalent to XOR Carry is equivalent to AND

12. 16/07/2015CSE1303 Part B lecture notes 12 Adder In 1 In 2 Carry Sum This circuit can add two binary digits and is called a half-adder

13. 16/07/2015CSE1303 Part B lecture notes 13 Adder533814+ 1 1 Why “half- adder”... ?... because to add multi-digit numbers each column requires two additions 9

14. 16/07/2015CSE1303 Part B lecture notes 14 Full adder in 1 in 2 sum carry out carry in half adders This circuit is called a full adder and can add three binary digits This OR gate combines the carries from the two half- adders

15. 16/07/2015CSE1303 Part B lecture notes 15 Ripple-carry adder A0 out3out2out1out0 B0 A1 B1 A2 B2 A3 B3

16. 16/07/2015CSE1303 Part B lecture notes 16 Ripple-carry adder A0 out3out2out1out0 B0 A1 B1 A2 B2 A3 B310011100 0101 + 0110 = 1011 + 0110 = 1011 1101 0010 100 0 0 0 1 0 0

17. 16/07/2015CSE1303 Part B lecture notes 17 Ripple-carry adder  So named because gate results (including carries) propagate (“ripple”) from LSB to MSB  right to left  corresponds to how humans add numbers with pen and paper  More sophisticated, faster, adder circuits exist that can create the higher order carries more quickly

18. 16/07/2015CSE1303 Part B lecture notes 18 Adder + Adders (and other arithmetic circuits) are usually drawn like this in block diagrams A3-A0B3-B0 out3-out0 inputs output collections of parallel, related wires like this are known as buses; they carry multi-bit values between components

19. 16/07/2015CSE1303 Part B lecture notes 19 Arithmetic  Computers need to do more than just addition  arithmetic: + – * / %  logic: & | ~ >  Need a circuit that can select operation to perform

20. 16/07/2015CSE1303 Part B lecture notes 20 Arithmetic Logic Unit (ALU) +*&<<... MUX op 0 op 1 op 2 op 3 op out AB Multiplexer: a combinatorial circuit which selects exactly one input op selects operation: 0 = add, 1 = multiply,... more operations here 0123..

21. 16/07/2015CSE1303 Part B lecture notes 21 Arithmetic Logic Unit (ALU) +*&<<... MUX op 0 op 1 op 2 op 3 op = 3 out = 60 A = 15 B = 2 other results also computed but ignored by multiplexer more operations here for example: compute 15 << 2 0123..

22. 16/07/2015CSE1303 Part B lecture notes 22 Memory  Computers need memory for storage  Different kinds of memory distinguished by speed, size, cost and proximity to CPU  main memory slowish, huge, cheap, far from CPUslowish, huge, cheap, far from CPU typical size 10 9 bitstypical size 10 9 bits  cache fast, medium-sized, expensive, near to CPUfast, medium-sized, expensive, near to CPU typical size 10 6 bitstypical size 10 6 bits  registers extremely fast, tiny, very expensive, located on CPUextremely fast, tiny, very expensive, located on CPU in MIPS (32 GPRs)×32 bits = 1024 bitsin MIPS (32 GPRs)×32 bits = 1024 bits

23. 16/07/2015CSE1303 Part B lecture notes 23 Memory  The smallest piece of memory is a single binary digit (bit)  can hold 0 or 1 only  A one-bit memory is called a flip- flop or a data latch  because its value can flip and flop between 0 and 1  because it can latch onto a data value and store it

24. 16/07/2015CSE1303 Part B lecture notes 24 Flip-flop  Flip-flop needs two operation modes  write: store (memorize) a value  read: load (recall) a previously stored value  Also need  data in for telling flip-flop what value to store (0 or 1)for telling flip-flop what value to store (0 or 1) used only when writingused only when writing  data out for finding out what value flip-flop currently contains (0 or 1)for finding out what value flip-flop currently contains (0 or 1) used only when readingused only when reading

25. 16/07/2015CSE1303 Part B lecture notes 25 Flip-flop  Flip-flop can be implemented with gates  Not combinatorial logic  because current output may depend on previous state  Example of sequential logic  current output depends on inputs and prior output

26. 16/07/2015CSE1303 Part B lecture notes 26 Flip-flop read/write data in data out read/write control: 0 = read, 1 = write NOR gate: OR gate followed by NOT gate

27. 16/07/2015CSE1303 Part B lecture notes 27 Flip-flop: writing read/write = 1 (write) data in = 1 data out = 1 1 1 1 0 0 1 1 0 1 0 1 when read/write = 1, data out = data in Try changing data in to 0 and watch data out

28. 16/07/2015CSE1303 Part B lecture notes 28 Flip-flop: reading read/write = 0 (read) data in = ? data out = 1 ? ? 0 ? 0 0 0 0 1 0 1 when read/write = 0, no signals in box can change, data out holds value regardless of data in

29. 16/07/2015CSE1303 Part B lecture notes 29 Flip-flop DQ CK Flip-flops are often drawn like this in block diagrams D = data in Q = data out CK is read/write (“clock” because this input is often connected to computer’s processor clock)

30. 16/07/2015CSE1303 Part B lecture notes 30 Memory  Memory can store many bits independently  many flip-flops  Need to identify which bit (flip-flop) to read or write  Give each flip-flop a unique number (address)

31. 16/07/2015CSE1303 Part B lecture notes 31 Memory D CK Q D CK Q D CK Q D CK Q 0 1 2 3... 0 1 2 3...... millions more flip-flops... MUX DEC address 0 address 1 address 2 address 3 data in address rd/wr data out Decoder: feeds input to selected output, 0 to all others

32. 16/07/2015CSE1303 Part B lecture notes 32 Memory: writing D CK Q D CK Q D CK Q D CK Q 0 1 2 3... 0 1 2 3...... millions more flip-flops... MUX DEC address 0 address 1 address 2 address 3 data in address rd/wr data out 0 2 1 Writing value 1 to flip-flop at address 2 1 1 0 0 1 ? ? 1 ?

33. 16/07/2015CSE1303 Part B lecture notes 33 Memory: reading D CK Q D CK Q D CK Q D CK Q 0 1 2 3... 0 1 2 3...... millions more flip-flops... MUX DEC address 0 address 1 address 2 address 3 data in address rd/wr data out 0 2 Reading value from flip-flop at address 2 1 0 0 0 0 1 1

34. 16/07/2015CSE1303 Part B lecture notes 34 Memory  Memory usually operates in terms of bytes (8 bits), not single bits  Repeat memory circuit eight times  connect each memory circuit to one of the eight lanes of the data bus  reads and writes occur in parallel for each bit in byte

35. 16/07/2015CSE1303 Part B lecture notes 35 Central Processing Unit (CPU)  Coordinates all computer’s components according to program being run  Contains  registers  ALU  program counter (PC) address of current instructionaddress of current instruction  instruction register (IR) copy of current instructioncopy of current instruction  control logic  Runs programs using fetch-(decode)- execute cycle

36. 16/07/2015CSE1303 Part B lecture notes 36 CPU Registers ALU PC IR Memory Controllogic in out addr rd/ wr

37. 16/07/2015CSE1303 Part B lecture notes 37 Fetch-execute cycle: fetch Registers ALU PC IR Memory Controllogic in out addr rd/ wr Stage 1 of fetch- execute cycle: instruction at address pointed to by PC is fetched into IR

38. 16/07/2015CSE1303 Part B lecture notes 38 Fetch-execute cycle: decode Registers ALU PC IR Memory Controllogic in out addr rd/ wr Stage 2 of fetch-execute cycle: instruction (now in IR) is decoded by control logic to determine which operation to perform

39. 16/07/2015CSE1303 Part B lecture notes 39 Fetch-execute cycle: execute Registers ALU PC IR Memory Controllogic in out addr rd/ wr Stage 3 of fetch- execute cycle: CPU performs the operation (for example, arithmetic on two registers)

40. 16/07/2015CSE1303 Part B lecture notes 40 Fetch-execute cycle: update PC Registers ALU PC IR Memory Controllogic in out addr rd/ wr Stage 4 of fetch- execute cycle: PC’s value is updated to point to the next instruction

41. 16/07/2015CSE1303 Part B lecture notes 41 Covered in this lecture  Gates  Combinatorial logic  adder  ALU  Sequential logic  flip-flop  memory  CPU  fetch-decode-execute cycle

42. 16/07/2015CSE1303 Part B lecture notes 42 Going further  Digital logic  CSE1308/CSE2306  Next time  Revision