1. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 1 Tridas Status Drew Baden University of Maryland December 2003 What’s new since September 2003…

2. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 2 Changes to HTR for Rev4 Changes to HTR motherboard –Moved 2 LC’s down to giver more clearance for fibers –Removed hot swapping circuits Worry about noise, decided not to require HTR to be hot swappable –Front-panel changes Rotary switch, LEDs, eliminate REFCLK mux via jumper, etc –Bias resistors for all differential pair inputs (startup technicality…) –Miscellaneous changes Fixed what was found to be wrong with Rev3 board, add test points, other minor stuff –Change DCC output cables from 10-pin RJ45 to…TBD Fanout input is 8-pin standard RJ45 Inadvertently plugging Fanout input into DCC output can destroy the connector –Changes to VME to accommodate software (Big/Little Endian defaults) Changes necessary for SLB –Spread out routing of differential pairs for 6 SLB and 2 FPGA system clocks –Changed HTR 40MHz input clock to come from TTC and not necessarily clean fanout TPG data and TTC broadcast need to have synchronization –Added hardware reset circuitry for TTCrx –Added separate SLB JTAG chain

3. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 3 HTR Schematic

4. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 4 Level 1 Latency ItemHBHEHF BX to QIE input224 QIE to GOL (FE)998 Optical Link (75m @1clock/5m) 15 HTR input to SLB input12 SLB444 TPG Cables (15m)333 TOTAL45 46 HCAL O-E QIECCA HTR SLB RCT BX TOF To RBX DataTo RCT RBX HPD or PMT (HF) 46 clocks = 1,147.7ns GOL Nothing has changed –FPGA logic includes summing Tullio believes he might be able to scrub 1 clock tick from these totals Slice test 2004 will battle test TPG path

5. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 5 Longterm Schedule

6. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 6 RCT Receivers We need to be able to send data to RCT Vitesse receiver boards –In a systm which is in our control –For production AND for commissioning Will build this capability into the HTR –Use existing SLB sites, run backwards into XILINX –Sandwich interface board in between Wisconsin receiver and existing HTR daughterboard site

7. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 7 Error Reporting/Recovery Monitoring path –HTR to DCC –DCC will be interface to TTS Current plans for monitoring –FE status (“capid”s) –FE link (HTR sets flag bits based on TI TLK2501 ER bit, illegal character) –TTCrx ready (in HTR) –Xilinx DLL lock Actions –When HTR detect FE errors: reset Trigger Primitives send errors to DCC DCC will hold 1 orbit’s worth of data, wait for orbit veto…under discussion –Caveats HTR 40MHz sysclock comes from TTCrx + DLL Need a scheme to monitor this using non-sysclocks (these do exist…) HTR Monitoring over VME –Many registers and useful information

8. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 8 Subsystem Software Plans Code developed from having to: –Debug at US contributing institutions Code to do VME operations to talk to HTR will be integrated –For debugging –For for production checkout –Run at H2 XDAQ, DCS, etc. under development –Vertical slice Ditto At this time…primitive, but effective –Need to be integrated….and it will be over time.

9. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 9 Production Status HTR –Jan 2003 Build 30-40 boards, assemble 3, test in lab –Feb 2003 Resubmit if necessary. If not, assemble remaining boards and checkout –March – May Send boards to various institutions in US Send boards to CERN for VerticalSlice and H2Testbeam Put in order for remaining HTRs (20% spares + 10% critical spare parts) –April/May to... (probably end of summer 04) Production checkout and ship to CERN –QA/QC: 2003 boards were almost perfect, assembler is good Production checkout should find all remaining problems. DCC and Fanout card –All done, ready to go, produce in Q1 2004 16 Fanout cards, 32 DCCs, plus spares

10. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 10 Return Air Guide Power Supply Zone Fan Tray Air/Water Heat Exchanger Cable Strain Relief Fan Tray Air/Water Heat Exchanger VME Rack Layout 56U Total rack height, 55 used (Note: Can recover 3U by using 1U exchangers) –Rack computer (3U) Air circulation has to be front → back ala DAQ crate –Recirculation/Monitoring (4U) –Extra Heat Exchanger –2 VME crate zones: Cable support (6U) –Front panel only –Fibers and TPG cables are formidable VME Crate (9U) Air/Water heat exchanger (2U) Fan Tray (2u) –Power Supply zone (6U) Cheaper, robust, safe, D0/CDF Air transport issue here Will have to build wire harness Put A/C circuit breakers here? –Return air guide (2U) 6U Cable Strain Relief Air/Water Heat Exchanger Recirc Fan/Rack Protection Rack CPU HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR DCCDCC DCCDCC CLKCLK HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR HTRHTR DCCDCC DCCDCC CLKCLK HTRHTR 2U 9U 6U 2U 9U 6U 2U 4U 3U Rack Wizard not yet visited, but this week Wesley promises a tutorial…

11. CMS/HCAL/TriDas. Dec, 2003 HCAL TriDAS 11 Cabling Ianos Schmidt working with integration group to minimize fibers –5m is 1 clock tick –HCAL requirement for latency: 75m max from FE to Tridas VME crates We will be ordering optical cables soon –This is a critical-path HCAL item, has mgmt’s attention TPG cables –Awaiting results of further testing Cat6 looks promising…would be very cheap, and would alleviate mechanical stresses and concerns –HCAL requirement for latency: 15m max from SLB to Vitesse receiver cards